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High Speed Schematic Design

Jun 20, 2015

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Technology

Pankaj Khodifad

High Speed Schematic Design
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Page 1: High Speed Schematic Design
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Presentation Contents

• Types of Terminators

• Terminator Resistor Selection and Cross-Talk

• Power System Distribution

• Selection Criteria of Bypass Capacitor

• Clock distribution fundamentals

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Introduction to Terminators A cable needs to be terminated when

• It’s long (its length exceeds 1/6 the electrical length of the rising edge) and reflections occur

• It’s short (its has large inductance and drives a large capacitive load) and ringing occurs

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Types of Terminators • End Terminations

• Series Terminations

• Middle Terminators

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End Terminations • The driving wave propagates at full intensity all the way down the

cable

• All reflections are damped by the terminating resistor

• The received voltage is equal to the transmitted voltage

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End Terminations • The termination arrangement just discussed rarely appears in TTL or

CMOS circuits because of the large drive current to maintain a high state.

• The driver must supply VCC/R1 to the terminating resistor With Z0 equal to 65ohm, a 5-V signal requires 5/65 = 76mA Current.

• For High Current Requirement split termination used.

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End Terminations • The parallel combination of R1 and R2 must equal Z0.

• We must not exceed loh max (maximum high-level output current).

• We must not exceed Iol max (maximum low-level output current).

• TTL and CMOS sinks current in low state and sources current in high state

• ECL sources current in both states.

• Y1=1/R1 and Y2=1/R2

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End Terminations

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Other Topologies Used with End Terminations

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Series Terminators

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Middle Terminators

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AC Biasing for End Terminators

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End Terminations for Differential Lines

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Terminator Resistor Selection

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Terminator Resistor Selection and Cross-Talk • To compute the worst-case terminating mismatch, the uncertainty in Zo is

added to the uncertainty in the terminating resistor.

• Power handing capacity of many resistors declines at elevated temperatures.

• Resistor bodies have thermal resistance rating (Degree Celsius rise per Watt)

• The vertical mount has a lower thermal resistance in still air than the horizontal mount.

• The horizontal mount has a lower inductance because the leads stay low. Along with resistance value, a tolerance, and power rating, the next most important factor is the parasitic series inductance.

• Every 1% of reactance causes 1/2% of reflection.

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Terminator Resistor Selection and Cross-Talk

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Cross-Talk

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Cross-Talk

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Cross-Talk

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Power Regulators

LDO

Switching Regulators

• Buck

• Boost

• Buck-Boost

Power Modules

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LDO

Pros:

Linear Operation

Easy to implement

No noise addition

Cost Effective

Less space on board

Cons:

Heats More

Less efficient

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Switching Regulator

Pros:

Most efficient

Can boost from Low input to higher output

Cons:

Switching noise addition

Ripple noise addition

Need more supporting components

Costly compare to LDO

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Power System Distribution • Power Rule 1. Use low-impedance ground connections between

gates.

• Power Rule 2. The impedance between power pins on any two gates should be just as low as the impedance between ground pins.

• Power Rule 3. There must be a low-impedance path between power and ground.

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Voltage reference used with single-ended logic

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Common-path noise caused by a ground connection

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Common-path inductance in power wiring

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Single-plane power system

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Differential signal transmission between gates

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Power System Design Take Care • Sense wires correct for resistance in power distribution wiring.

• Inductance in power wiring presents a much harder problem than resistance.

• Use lower-inductance wiring.

• Use logic immune to power supply noise.

• Reduce the size of changing power supply currents.

• It is almost impossible to reduce wiring inductance by simply using a bigger wire.

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Power System Design Take Care • A power supply provides low impedance at low frequencies. Local bypass

capacitors provide low impedance at higher frequencies.

• The best way to get very low inductance is to parallel a lot of small capacitors.

• Power and ground planes separated by 0.01 in. of FR-4 have a capacitance of 100

pF/in.

• Wide, flat parallel structures work much better as distribution wiring than round

wires.

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Selection Criteria of Bypass Capacitor • Lead inductance acts like an inductor in series with a capacitor. ESR acts like

a resistor in series with a capacitor.

• Together they degrade a capacitor's effectiveness as a bypass element.

• For large-valued capacitors, smaller packages have higher series inductance and ESR than larger packages.

• Capacitor performance varies widely.

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Selection Criteria of Bypass Capacitor

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Selection Criteria of Bypass Capacitor • When mounting components on the back side of any printed circuit board,

determine whether your manufacturing shop will use the reflow or wave solder

assembly method.

• Aluminum electrolytics are the workhorse capacitors most often used for board-

level bypass. Their characteristics are similar to those of tantalum, which has an

even higher dielectric constant at a slightly higher cost.

• The Z5U dielectric material has a higher dielectric constant than X7R but worse

temperature and aging properties. Below 10°C, Z5U is not recommended.

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Selection Criteria of Bypass Capacitor • The X7R dielectric material has a lower dielectric constant than Z5U, but better

temperature and aging properties.

• Higher-dielectric-constant materials pack more capacitance into a smaller space

but have poor temperature coefficients and aging instability.

• Aluminum electrolytics do not work well in cold applications.

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Clock distribution fundamentals • Timing margin measures the slack, or excess time, remaining in each

clock cycle.

• Timing margin protects your circuit against signal crosstalk, miscalculation of logic delays, and later minor changes in the layout.

• Clock skew has as much of an impact on overall operating speed as any other propagation delay.

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Clock Tree

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Clock distribution fundamentals • Slow the rise time of the driver.

• Lower the capacitance of each tap.

• Lower the characteristic impedance of the clock distribution line, (Zo).

• A 20 Ὠ clock line is 2.5 times less sensitive to the capacitance of clock taps than a 50 Ὠ line.

• A single driver can service two or more source-terminated lines under restricted circumstances.

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Single clock driver feeding two source-terminated lines

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Fixed Delay Adjustments

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Adjustable Delays

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Automatically Programmable Delays

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Delays for Timing Requirement

• Delay elements are built from three basic building blocks transmission lines, logic gates, and passive lumped circuits.

• A fixed delay cannot cancel variations in board fabrication or active component delay.

• An adjustable delay compensates for actual delays, not just nominal delays, elsewhere in the circuit.

• Whatever form of delay you choose, incorporate its uncertainty in delay into your timing margin calculations.

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Canceling Parasitic Capacitance of a Clock Repeater

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