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Freq Rsp Ssa

Jun 01, 2018

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Rajeev Yadav
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    Microelectronic

    BITS PilaniCam us  Anu Gu ta

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    anPilani Campus

     

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    amplifier 

     

    achieve desired response

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    Key questions

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

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    Why high frequency

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    Bits, pilani

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    Motivation

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    Bits, pilani

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    Intrinsic frequency response

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    Bits, pilani

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    Why f t is chosen as figure of

    Why current gain of common source---Because it is related

    to transit time from source to drain which determines

    max speed of mosfet

    Why short circuit- because current gain is maximum for

    short circuited output port

    BITS Pilani, Pilani Campus

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    Intrinsic frequency response

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

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    Bits, pilani

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    Bits, pilani

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    Bits, pilani

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    MOS unity gain frequency wT

    Limits for MOSFETs:

    Metric –C.S short-circuit current gain unit gain freq.:

    wT = (gm-SCgd)/[s(Cgs+Cgd)]

    wT is approximately = gm /Cgs

    = - 2 

    Where gm = (W/L) unCox(VGS -VT) and

    Cgs = (2/3)WLCox

    so wT≈ 3 μn(VGS -VT)/2L2

    Design lessons – to increase wT bias at large, overdrive voltage ID –swing reduces

    BITS Pilani, Pilani Campus

    Bits, pilani

    minimize L (w in as L2) , λ (= 1/L)increases, ROUT dec.

    use n-channel over p-channel , NOISE increases

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    Bits, pilani

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    Bits, pilani

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    Freq. Response of Common source

    C = C +C 

    Bits, pilani

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    Bits, pilani

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    Two closely spaced pole frequencies (s) and one zero transmission freq

    Rd CLRs Rd

    Rd CLCLRs

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    Roots—1+as+bs2

    =

    2

    b

    ss

    2

    2,1  

    Rd CLRs Rd

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    s

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    Exact Expressions

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

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    Pole estimation Intuitively

    Zero has to be found out through observing circuit

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    f f

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    Physical significance of pole

    Gain de radation---C s im edance reduces v s lits

    between Rs and 1/sCgs vgs ↓ gm vgs ↓ vout ↓

    Phase shift---due to time constant of intermediate node----charging/discharging takes time- output waveform

    shifts on time axis

    BITS Pilani, Pilani Campus

    D i hi l i f

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    Dc gain--- graphical view of

    Low freq 

    High freq 

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    G i d ti /ti hift

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    Gain reduction/time shift —

    Low fre

    High freq---gain

    degradation, phase shift

     

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

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    Example

    g = 0.1mA/v

    Rd= 100kR = 1k

    GBW=wT = 4 x 109 rad/sec

    Cgd= 5fF

    =Cdb= 0.1fF

    = - 9 9. .

    s= -55 x 109, -2 x 109 Hence, Critical wp1

    BITS Pilani, Pilani Campus

    Bits, pilani

    F ( ith t

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    Frequency response (without

    Two poles

    Multiple poles

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    Bits, pilani

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    If poles are close to each other 

    BITS Pilani, Deemed to be University under Section 3 of UGC Act, 1956

    f

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    Easy way to find poles—dominant pole

    approx.

    = w-3dB

    Bits, pilani= 1.75 x 109

    ---------------- approx. estimate

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    = 56 x 109

    Bits, pilani

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    • --- = =n   , p   -   n

    • Case2----wout is small, then w 1= w-3db=wout

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    C dominates– sim lified ex ression

    wp

    1

     Ld 

    Then

    Cgd  AC  Rwp

    gss )1(

    1

    Cgs dominates DOMINANT PO E

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    Cgs dominates— DOMINANT POLE

    wp 11 gss  , ------ 0 -3dB

    W-3dB =wH = 1/ Rs Cgs

    Why

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    Why 

    Bits, pilani

    UGB=UGB ≈ Ao / [R C ]

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    UGB=UGB csa≈  Ao / [Rs Cgs]

    ≈ wtmos d   s

    =w = 1/ R C-

    When Cgs (win) dominates---UGB csa may not

    .

    As UGB = Ao / (Cgs +Ao Cgd) Rs

    a er may ec. ue o nc. n

    hence Cgs, Cgd.

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    Impact of increasing AO on freq.

    various pole frequency conditions

    Using Bode plots

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    • increasing gm,• ncreas ng out,

    • increasing both

    We are changing the design of amplifier 

    6 cases

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    6 cases

    Single pole response before UGB

    • ----A is increased by increasing gm,---- out,

    • ----- A is increased by increasing both

    Two pole response before UGB

    • ----A is increased by increasing g ,

    • ----A is increased by increasing Rout

     

    Cgs dominates

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    Cgs dominates,ase --- om nan po e response --- po e

    as A is increased by increasing gm, keeping Rout same

    Dominant pole response

    p2

    WLog scale

    UGB

    Wp1

      gs  

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     • --- 

    may not increase with increase in Ao.

    a er may ec. ue o nc. n ence

    Cgs, Cgd.

    Cgs dominates,

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    Cgs dominates,

    Case 2--- win=wp1 ; wp2 pole > UGB

    as A is increased by increasing Rout only

     Ld C  Rwp2 

    UGB wp2

    WLog scaleWp1

    = 1/ Rs C + AC d

    Cgs dominates,

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    Cgs dominates,

    Case 3--- win=wp1 ; wp2 pole > UGB

    as A is increased by increasing gm, and Rout both

    UGB wp2

    WLog scaleWp1

    = 1/ Rs C + AC d

    Cgs dominates,

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    ---   —as A is increased, keeping Rout same: (wp2 remains same),

    UGB decreases

    |A|2 pole response

    Dominant pole response

    w Log scale

    wp

    UGB

    Wp1

    = 1/ [Rs Cgs+ ACgd]

    Cgs dominates,

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    ---   —as A is increased, increasing Rout only: (wp2 reduces ), UGB

    decreases1

    |A|2 pole response

     Ld C  R

    wp2  

    Dominant pole response

    w Log scale

    wp2

    UGB

    Wp1

    = 1/ [Rs Cgs+ ACgd]

    Cgs dominates,

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    ---   —as A is increased, increasing both: (wp2 reduces ), UGB

    decreases1

     Ld C  R

    wp2  

    |A|2 pole response

    Dominant pole response

    w Log scale

    wp2

    UGB

    Wp1

    = 1/ [Rs Cgs+ ACgd]

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    =

    1

     Ld C  Rwp  

     Wp1= 2x 109

    gssC  R

    wp2   Wp2 = 50 x 109

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     =m   .

    Rd= 100ks  

    Cgd= 5fF Small, but Rd

    Cdb

    +CL is large

    gs=

    Cdb+ CL= 0.1fF

    = 50 pf 

    gs   ,

    Unity gain bandwidth UGB (f t)

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    U y g UG ( t)

    • A(s) = Ao wH here wH= w-3db

    • For dominant pole, we can neglect second

    pole

    wz

    -

    • s= a s = = ------ wt = 0 w-3dB

    Bits, pilani

      t   m d   d L   m   LHere output pole is dominant

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     1

    = wH /2π

     Ld 

     H 

    C  R

    wpw  

    wH = w-3dB

    UGB=Wt csa≈ gm / CL

    = =nmos

    High f T means high UGB and high w-3dB bandwidth

    -   u

    Bits, pilani

    Hence scaling is beneficial as small mos, so Cgs↓ gm

    If CL dominates---UGB csa increases with increase

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    As UGB = A / CL Rout

      ------

    1--But as A increases (redoing the design keeping.,

    also constt. ) 

    gm   UGB increases

    But gm ↑ Cgs ↑ Rs Cgs ↑  second pole freq. reduces 

    ma become dominant UGB ma reduce

    2--A increases due to Rout ↑ 

    first pole freq.

    reduces UGB reduces

    If CL dominates, Dominant pole response

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    L ,case1-as A is increased, keeping Rout same, UGB increases

    |A|

    Dominant pole response

    Wp2

     

    UGB’

     

    Log scaleWp1

    = 1/ Rout CL

    CL dominates, Dominant pole response

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    case --as s ncrease y ou , wp re uces soUGB remains same, wp2 nearly same

    |A|

    Dominant pole response

     ’  Log scale

    Wp1

    = 1/ Rout CL

    CL dominates, Dominant pole response

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    case --as s ncrease y nc. o , wp re uces soUGB reduces

    |A|

    Dominant pole response

    w Log

    scale

    ’Wp1

    = 1/ Rout CL

    If CL dominates, 2 pole response

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    --   , ,

    UGB increases

     ANon Dominant pole response

    Dominant pole response

    w Log scale

    wp2Wp1

    = 1/ Rout CL

    To keep power, output swing constt. , gm is to increase to increase A, or

    w/L ↑  Cgs  ↑  wp2 ↓

    OTE ----- , , L

    ↑ , so wp1 ↓ slightly 

    If CL dominates, 2 pole response

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    ----   , , . ,

    increases

     ANon Dominant pole response

    Dominant pole response

    w Log scale

    wp2Wp1

    = 1/ Rout CL

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    If Cgs dominates---UGBcsa

    may not increase

    As UGB = A / (Cgs +A Cgd) Rs

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    always remains constant

    • When we redo the design and increase

    ga n, ncrease n may cause ncrease n

    bandwidth. Don’t confuse it with above

    concep

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    Bits, pilani

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    y oes ga n a

     

    Zin, Zout Signal gets reduced

    Time constant of these nodes shd. be

    evaluated without finding transfer function

    Bits, pilani

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    Bits, pilani

    Approx.

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    Bits, pilani

     Application of OCTC to evaluate bandwidth of

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    Bits, pilani

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    Bits, pilani

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    = 1.7 x 109

    = 2 x 109

    Bits, pilani

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    Bits, pilani

    Millers theorem

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    Vy - Vx Vy

    Bits, pilani

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    2

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    is implemented by a non-inverting amplifier with Av > 1.e curren c anges s rec on as e ou pu vo age

    is higher than the input voltage.

    • If the input voltage source has some internal

    impedance   Zint or if it is connected through another 

    impedance element, a positive feedback appears

    Bits, pilani

     

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    ,

    process, the dual version is a powerful tool for  designing and understanding circuits based on

    modifying impedance by additional current.

    • Typical applications are some exotic circuits with

    ,

    capacitance neutralizers

    Bits, pilani

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    R1 is the only path from x to y. Another dominant path should beresent

    Bits, pilani

    we canot apply miller th. in backward manner i.e o/p to i/p as

    vo=A vin not valid.

     

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    Z in parallel to main signal path

    Bits, pilani

    Miller theorem applied to CSA

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    = 13.3 x 109

    This is Wp1 if RsCgs >> RoutCL

    = 1.96 x 109

    Bits, pilani

     

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    wp1= 2 x 109

    w 2= 55 x 109

    = 1.96 x 109

    win = 13.3 x 10

    Bits, pilani

    Zin

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    • Zin=∞ at s= small

    • When s large

    • Zin1/ s[Cgs + (1 +A ) Cgd] ; A = gm

    (Rd

    ||r o

    || 1/sCdb

    )

    • When s very large Rd and Cdb comes into effect

    • Zin (1 /gm) ||r o || Rd || 1/sCdb

     

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    Low freq. value= ∞

    Drops to low value quickly because Cgs is large value

    Zout

    Z t

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    Zout

    =out   d 0  

    When s large

    in d r o   s db s gd ; = gm d r o   s db

     

    Zin (1 /gm) ||r o || Rd || 1/sCdbSame as Zin

    ---

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    Low freq. value

    Low value at high freq

    Bits, pilani

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    Bits, pilani

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    Zero transmission frequency

    Bits, pilani

     

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    -wz

    • 20 lo A = 20 lo R

    Zero increases gain magnitude

    Why?

    » +√(1+ w2/wz2)

    - p1

    » -√(1+ w2/wp22)]

    Physical explanation

    iouti

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    • When Cgd path becomes effective , i starts flowing

    throu h C d, thus addin to v current

    • So iout increases, so Gm increases beyond gm, so gain

    increases

    • Gm =iout/vgs = (gm - sCgd );

    • Gm =√ gm2 + (wCgd )2 ; > gm

    Phase shift

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    -zero

    input

    +zero

    Bits, pilani

    Feed-forward path----origin of zero

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    Estimation of zero---easy way

    iouti

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    wz-

    vgs

    Estimation of zero---easy way

    From transfer function at s w ; A(s)0

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    From transfer function, at s wz; A(s)0

    vout(s)0

    So to estimate wz magnitude------ Short output to ground

    Write KCL at out ut node

    S Cgd (vgs-0) = gm vgs wz = gm/ Cgd

      ,

    + zero when currents meet in anti phase at a node -

    For CSA wz = +2 x 1010 rad/sec

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    Bode magnitude plot (with transmission

    zero

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    Bits, pilani

    Bode plots— corner plots

    Θ= - tan-1

    (w/wp1) - tan-1

    (w/wp2) - tan-1

    (w/wz)|A|

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    - 20dB er decade

    - 40dB per decade

    WP1 WP2WZ

    0.1 WP1 10 WP1θ

    -20dB per dec

    -90

    -180

    ~ -195

    -270

    Observations

    • Gain starts falling at wp, Phase starts

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    .

    • At UGB total extra phase > 180o

     

    • So total phase ≈ 360o output in phase

    • If feedback is used, output will add to

    •   output amplitude will keep on growing till

    Bode plots— corner plots of our examplep < wz< wp --- ncrease ug ut severe p ase egra at on ea s to nsta ty

    |A|

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    - 20dB er decade

    UGB

    - 20dB per decade

    WP1 WP2WZ

    0.1 WP1 10 WP1θ

    -20dB per dec

    -90

    -180

    -270

    >-270

    anPilani Campus

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