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February 2012 © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7710V • 1.0.4 FAN7710V— Ballast Control IC for Compact Fluorescent Lamps FAN7710V Ballast Control IC for Compact Fluorescent Lamps Features Integrated Half-Bridge MOSFET Floating Channel FAN7710V for Bootstrap Operation to +440V Low Startup and Operating Current: 120μA, 2.6mA Under-Voltage Lockout with 1.8V of Hysteresis Adjustable Run Frequency and Preheat Time Internal Active ZVS Control Internal Protection Function (No Lamp) Internal Clamping Zener Diode High Accuracy Oscillator Soft-Start Functionality Applications Compact Fluorescent Lamp Ballast Description FAN7710V developed using Fairchild’s high-voltage process and system-in-package (SiP) concept, are ballast-control integrated circuits (ICs) for compact fluorescent lamps (CFL). FAN7710V incorporates a preheating / ignition function, controlled by a user- selected external capacitor, to increase lamp life. The FAN7710V detects switch operation after ignition mode through an internal active Zero-Voltage Switching (ZVS) control circuit. This control scheme enables the FAN7710V to detect an open-lamp condition, without the expense of external circuitry, and prevents stress on the MOSFETs. The high-side driver in the FAN7710V has a common-mode noise cancellation circuit that provides robust operation against high-dv/dt noise intrusion. 8-DIP Ordering Information Part Number Operating Temperature Package Packing Method FAN7710VN -40 to +125°C 8-Lead Dual Inline Package (DIP) Tube
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Page 1: FAN7710V Ballast Control IC for Compact Fluorescent Lamps semiconductor_fan7710v-320512.pdf · FAN7710V — Ballast Control IC for Compact Fluorescent Lamps Absolute Maximum Ratings

February 2012

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7710V • 1.0.4

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FAN7710V Ballast Control IC for Compact Fluorescent Lamps

Features

Integrated Half-Bridge MOSFET

Floating Channel FAN7710V for Bootstrap Operation to +440V

Low Startup and Operating Current: 120μA, 2.6mA

Under-Voltage Lockout with 1.8V of Hysteresis

Adjustable Run Frequency and Preheat Time

Internal Active ZVS Control

Internal Protection Function (No Lamp)

Internal Clamping Zener Diode

High Accuracy Oscillator

Soft-Start Functionality

Applications

Compact Fluorescent Lamp Ballast

Description

FAN7710V developed using Fairchild’s high-voltage process and system-in-package (SiP) concept, are ballast-control integrated circuits (ICs) for compact fluorescent lamps (CFL). FAN7710V incorporates a preheating / ignition function, controlled by a user-selected external capacitor, to increase lamp life. The FAN7710V detects switch operation after ignition mode through an internal active Zero-Voltage Switching (ZVS) control circuit. This control scheme enables the FAN7710V to detect an open-lamp condition, without the expense of external circuitry, and prevents stress on the MOSFETs. The high-side driver in the FAN7710V has a common-mode noise cancellation circuit that provides robust operation against high-dv/dt noise intrusion.

8-DIP

Ordering Information

Part Number Operating

Temperature Package Packing Method

FAN7710VN -40 to +125°C 8-Lead Dual Inline Package (DIP) Tube

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© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN7710V • 1.0.4 2

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Typical Applications Diagrams

FA

N7

710V

Figure 1. Typical Application Circuit for Compact Fluorescent Lamp

Internal Block Diagram

Figure 2. Functional Block Diagram

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Pin Configuration

Figure 3. Pin Configuration (Top View)

Pin Definitions

Pin # Name Description

1 VDC High-Voltage Supply

2 VB High-Side Floating Supply

3 VDD Supply Voltage

4 RT Oscillator Frequency Set Resistor

5 CPH Preheating Time Set Capacitor

6 SGND Signal Ground

7 PGND Power Ground

8 OUT High-Side Floating Supply Return

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Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.

Symbol Parameter Min. Typ. Max. Unit

VB High-Side Floating Supply Voltage -0.3 465.0 V

VOUT High-Side Floating Supply Return -0.3 440.0 V

VIN RT, CPH Pins Input Voltage -0.3 8.0 V

ICL Clamping Current Level(1) 25 mA

dVOUT/dt Allowable Offset Voltage Slew Rate 50 V/ns

TA Operating Temperature Range -40 +125 °C

TSTG Storage Temperature Range -65 +150 °C

PD Power Dissipation 2.1 W

ΘJA Thermal Resistance, Junction-to-Air 70 °C/W

Note: 1. Do not supply a low-impedance voltage source to the internal clamping Zener diode between the GND and the

VDD pin of this device.

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Electrical Characteristics

VBIAS (VDD, VB -VOUT)=14.0V and TA=25°C, unless otherwise specified.

Symbol Parameter Conditions Min. Typ. Max. Unit

High-Voltage Supply Section

VDC High-Voltage Supply Voltage 440 V

Low-Side Supply Section (VDD)

VDDTH(ST+) VDD UVLO Positive-Going Threshold VDD Increasing 12.4 13.4 14.4

V VDDTH(ST-) VDD UVLO Negative-Going Threshold VDD Decreasing 10.8 11.6 12.4

VDDHY(ST) VDD-Side UVLO Hysteresis 1.8

VCL Supply Camping Voltage IDD=10mA 14.8 15.2

IST Startup Supply Current VDD=10V 120 µA

IDD Dynamic Operating Supply Current 50kHz, CL=1nF 2.6 mA

High-Side Supply Characteristics (VB-VOUT)

VHSTH(ST+) High-Side UVLO Positive-Going Threshold VB-VOUT Increasing 8.5 9.2 10.0

V VHSTH(ST-) High-Side UVLO Negative-Going Threshold VB-VOUT Decreasing 7.9 8.6 9.5

VHSHY(ST) High-Side UVLO Hysteresis 0.6

IHST High-Side Quiescent Supply Current VB -VOUT=14V 50 µA

IHD High-Side Dynamic Operating Supply Current 50kHz, CL=1nF 250

Oscillator Section

VMPH CPH Pin Preheating Voltage Range 2.5 3.0 3.5 V

IPH CPH Pin Charging Current During Preheating VCPH=1V 1.25 2.00 2.85 µA

IIG CPH Pin Charging Current During Ignition VCPH=4V 8 12 16

VMO CPH Pin Voltage Level at Running Mode 7.0 V

fPRE Preheating Frequency RT=80kΩ, VCPH=2V 72 85 98 kHz

fOSC Running Frequency RT=80kΩ 48.7 53.0 57.3 kHz

DTMAX Maximum Dead Time VCPH=1V, VOUT=SGND During Preheat Mode

3.1 µs

DTMIN Minimum Dead Time VCPH=6V, VOUT=SGND During Run Mode

1.0 µs

Protection Section

VCPHSD Shutdown Voltage VRT=0 After Run Mode

2.6 V

ISD Shutdown Current 250 450 µA

TSD Thermal Shutdown(2) +165 °C

Internal MOSFET Section

ILKMOS Internal MOSFET Leakage Current VDS=400V 50 µA

RON Static Drain-Source On-Resistance VGS=10V, ID=190mA 4.6 6.0 Ω

IS Maximum Continuous Drain-Source Diode Forward Current 0.38 A

ISM Maximum Pulsed Continuous Drain-Source Diode Forward Current 3.04

VSD Drain-Source Diode Forward Voltage VGS=0V, IS=0.38A 1.4 V

Note: 2. These parameters, although guaranteed, is not 100% tested in production.

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Typical Performance Characteristics

Figure 4. Startup Current vs. Temperature Figure 5. Preheating Current vs. Temperature

Figure 6. Ignition Current vs. Temperature Figure 7. Operating Current vs. Temperature

Figure 8. High-Side Quiescent Current vs. Temperature

Figure 9. Shutdown Current vs. Temperature

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Typical Performance Characteristics (Continued)

Figure 10. VDD UVLO vs. Temperature Figure 11. VBS UVLO vs. Temperature

Figure 12. VDD Clamp Voltage vs. Temperature Figure 13. Shutdown Voltage vs. Temperature

Figure 14. Running Frequency vs. Temperature Figure 15. Preheating Frequency vs. Temperature

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Typical Performance Characteristics (Continued)

Figure 16. Minimum Dead Time vs. Temperature Figure 17. Maximum Dead Time vs. Temperature

Figure 18. On-Region Characteristics Figure 19. On-Resistance Variation vs.

Drain Current and Gate Voltage

Figure 20. Body Diode Forward Voltage Variationvs. Source Current and Temperature

Figure 21. Breakdown Voltage Variation vs. Temperature

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Typical Performance Characteristics (Continued)

Figure 22. On-Resistance Variation vs. Temperature Figure 23. Maximum Safe Operating Area

Figure 24. Maximum Drain-Current vs. Case Temperature

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Typical Application Information

1. Under-Voltage Lockout (UVLO) Function The FAN7710V has UVLO circuits for both high-side and low-side circuits. When VDD reaches VDDTH(ST+), UVLO is released and the FAN7710V operates normally. At UVLO condition, FAN7710V consumes little current, noted as IST. Once UVLO is released, FAN7710V operates normally until VDD goes below VDDTH(ST-), the UVLO hysteresis. At UVLO condition, all latches that determine the status of the IC are reset. When the IC is in the shutdown mode, the IC can restart by lowering VDD voltage below VDDTH(ST-).

FAN7710V has a high-side gate driver circuit. The supply for the high-side driver is applied between VB and VOUT. To protect from malfunction of the driver at low supply voltage between VB and VOUT, there is an additional UVLO circuit between the supply rails. If VB-VOUT is under VHSTH(ST+), the driver holds LOW state to turn off the high-side switch, as shown in Figure 25. As long as VB-VOUT is higher than VHSTH(ST-) after VB-VOUT exceeds VHSTH(ST+), operation of the driver continues.

2. Oscillator The ballast circuit for a fluorescent lamp is based on the LCC resonant tank and a half-bridge inverter circuit, as shown in Figure 25. To accomplish Zero-Voltage Switching (ZVS) of the half-bridge inverter circuit, the LCC is driven at a higher frequency than its resonant frequency, which is determined by L, CS, CP, and RL; where RL is the equivalent lamp's impedance.

OUT

VB

VDC

PGND

CPH

RT

VDD

SGND

High-sidedriver L CS

CP

equivalent lamp impedance

RL

LCC resonant tankFilament

Inverter

Low-sidedriver

Dead-timecontroller

Oscillator

RT

FAN7710

CPH

VDD

VDC

FAN7710 Rev. 1.00

Figure 25. Typical Connection Method

The transfer function of LCC resonant tank is heavily dependent on the lamp impedance, RL, as illustrated in Figure 26. The oscillator in FAN7710V generates effective driving frequencies to assist lamp ignition and improve lamp life longevity. Accordingly, the oscillation frequency is changed in following sequence:

Preheating Frequency → Ignition Frequency → Normal Running Frequency

Before the lamp is ignited, the lamp impedance is very high. Once the lamp is turned on, the lamp impedance significantly decreases. Since the resonant peak is very high due to the high-resistance of the lamp at the instant of turning on the lamp, the lamp must be driven at higher frequency than the resonant frequency, shown as (A) in Figure 26. In this mode, the current supplied by the inverter mainly flows through CP. CP connects both filaments and makes the current path to ground. As a

result, the current warms up the filament for easy ignition. The amount of the current can be adjusted by controlling the oscillation frequency or changing the capacitance of CP. The driving frequency, fPRE, is called preheating frequency and is derived by:

.PRE OSCf 1 6 f= × (1)

After the warm-up, the FAN7710V decreases the frequency, shown as (B) of Figure 26. This action increases the voltage of the lamp and helps the fluorescent lamp ignite. The ignition frequency is described as a function of CPH voltage, as follows:

( )IG CPH OSCf 0.3 5-V 1 f = × + × (2)

where VCPH is the voltage of CPH capacitor.

Equation 2 is valid only when VCPH is between 3V and 5V before entering running mode. Once VCPH reaches 5V, the internal latch records the exit from ignition mode. Unless VDD is below VDDTH(ST-), the preheating and ignition modes appear only during lamp-start transition.

Finally, the lamp is driven at a fixed frequency by an external resistor, RT, shown as (C) in Figure 26. If VDD is higher than VDDTH(ST+) and UVLO is released, the voltage of the RT pin is regulated to 4V. This voltage adjusts the oscillator's control current according to the resistance of RT. Because this current and an internal capacitor set the oscillation frequency, the FAN7710V does not need any external capacitors.

The proposed oscillation characteristic is given by:

9

OSC4 10

f RT

×=

(3)

Even in the active ZVS mode, shown as (D) in Figure 26, the oscillation frequency is not changed. The dead time is varied according to the resonant tank characteristic.

0dB

20dB

40dB

RL=100k

RL=1k

RL=500

Preheatingfrequency

(A)

(B)

(C)

(D) Dead-time control modeat fixed frequency

RL=10k

Running frequency

FAN7710 Rev. 1.00

Figure 26. LCC Transfer Function in Terms

of Lamp Impedance

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3. Operation Modes FAN7710V has four operation modes: (A) preheating mode, (B) ignition mode, (C) active ZVS mode and (D) shutdown mode; all depicted in Figure 27. The modes are automatically selected by the voltage of CPH capacitor shown in Figure 27. In modes (A) and (B), the CPH acts as a timer to determine the preheating and ignition times. After preheating and ignition modes, the role of the CPH is changed to stabilize the active ZVS control circuit. In this mode, the dead time of the inverter is selected by the voltage of CPH. Only when in active ZVS mode is it possible to shut off the whole system using the CPH pin. Pulling the CPH pin below 2V in active ZVS mode causes the FAN7710V series to enter shutdown mode. In shutdown mode, all active operation is stopped except UVLO and some bias circuitry. The shutdown mode is triggered by the external CPH control or the active ZVS circuit. The active ZVS circuit automatically detects lamp removal (open-lamp condition) and decreases CPH voltage below 2V to protect the inverter switches from damage.

1

2

3

4

5

6

7

8

(A) Preheating Mode

(B) Ignition Mode

time

CPH voltage [V]

0

Oscillationfrequency

Preheating Frquency:fPRE

Running frequency:fOSC

time

PreheatingMode

RunningMode

IgnitionMode

(C) Active ZVS mode

123 0Dead-Time[μs]

(D) Shutdownmode

CP

H vo

ltage

varies by

active ZV

S co

ntro

lcircu

it

DT

MA

X

DT

MIN

t0 t1 t2 t3

FAN7710 Rev. 1.00 Figure 27. Operation Modes

3.1 Preheating Mode (t0~t1)

When VDD exceeds VDDTH(ST+), the FAN7710V series starts operation. At this time, an internal current source (IPH) charges CPH. CPH voltage increases from 0V to 3V in preheating mode. Accordingly, the oscillation frequency follows Equation 4. In this mode, the lamp is not ignited, but warmed up for easy ignition. The preheating time depends on the size of CPH:

]onds[secI

CPH3t

PHpreheat

×= (4)

According to the preheating process, the voltage across the lamp to ignite is reduced and the lifetime of the lamp is increased. In this mode, the dead time is fixed at its maximum value.

3.2 Ignition Mode (t1~t2)

When the CPH voltage exceeds 3V, the internal current source charging CPH is increased about six times larger than IPH, noted as IIG, causing rapid increase in CPH voltage. The internal oscillator decreases the oscillation frequency from fPRE to fOSC as CPH voltage increases. As depicted in Figure 27, lowering the frequency increases the voltage across the lamp. Finally, the lamp ignites. Ignition mode is when CPH voltage is between 3V and 5V. Once CPH voltage reaches 5V, the FAN7710V does not return to ignition mode, even if the CPH voltage is in that range, until the FAN7710V restarts from below VDDTH(ST-). Since the ignition mode continues when CPH is from 3V to 5V, the ignition time is given by:

]onds[secI

CPH2t

IGignition

×= (5)

In this mode, dead time varies according to the CPH voltage.

3.3 Running Mode and Active Zero-Voltage Switching (AZVS) Mode (t2~)

When CPH voltage exceeds 5V, the operating frequency is fixed to fOSC by RT. However, active ZVS operation is not activated until CPH reaches ~6V. Only the FAN7710V prepares for active ZVS operation from the instant CPH exceeds 5V during t2 to t3. When CPH becomes higher than ~6V at t3, the active ZVS operation is activated. To determine the switching condition, FAN7710V detects the transition time of the output (VS pin) of the inverter by using the VB pin. From the output-transition information, FAN7710V controls the dead time to meet the ZVS condition. If ZVS is satisfied, the FAN7710V slightly increases the CPH voltage to reduce the dead time and to find optimal dead time, which increases the efficiency and decreases the thermal dissipation and EMI of the inverter switches. If ZVS fails, the FAN7710V decreases CPH voltage to increase the dead time. CPH voltage is adjusted to meet optimal ZVS operation. During the active ZVS mode, the amount of the charging / discharging current is the same as IPH. Figure 28 depicts normal operation waveforms.

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Figure 28. LCC Transfer Function in Terms

of Lamp Impedance

3.4 Shutdown Mode

If the voltage of capacitor CPH is decreased below ~2.1V by an external application circuit or internal protection circuit, the IC enters shutdown mode. Once the IC enters shutdown mode, this status continues until an internal latch is reset by decreasing VDD below VDDTH(ST-). Figure 29 shows an example of external shutdown control circuit.

Figure 29. External Shutdown Circuit

The amount of the CPH charging current is the same as IPH, making it possible to shut off the IC using a small signal transistor. Only the FAN7710V provides active ZVS operation by controlling the dead time according to the voltage of CPH. If ZVS fails, even at the maximum dead time, FAN7710V stops driving the inverter.

The FAN7710V thermal shutdown circuit senses the junction temperature of the IC. If the temperature exceeds ~160°C, the thermal shutdown circuit stops operation of the FAN7710V.

The current usages of shutdown mode and under-voltage lockout status are different. In shutdown mode, some circuit blocks, such as bias circuits, are kept alive. Therefore, the current consumption is slightly higher than during under-voltage lockout.

4. Automatic Open-Lamp Detection The FAN7710V can automatically detect an open-lamp condition. When the lamp is opened, the resonant tank fails to make a closed-loop to the ground, as shown in Figure 30. The supplied current from the OUT pin is used to charge and discharge the charge pump capacitor, CP. Since the open-lamp condition means resonant tank absence, it is impossible to meet ZVS condition. In this condition, the power dissipation of the FAN7710V, due to capacitive load drive, is estimated as:

[ ]2dissipation P DC

1P C V f W

2= × × ×

(6)

where f is driving frequency and VDC is DC-link voltage.

Figure 30. Current Flow When the Lamp is Open

Assuming that CP, VDC, and f are 1nF, 311V, and 50kHz, respectively; the power dissipation reaches about 2.4W and the temperature of is increased rapidly. If no protection is provided, the IC can be damaged by the thermal attack. Note that a hard-switching condition during the capacitive-load drive causes EMI.

Figure 31 illustrates the waveforms during the open-lamp condition. In this condition, the charging and discharging current of CP is directly determined by FAN7710V and considered hard-switching condition. The FAN7710V tries to meet ZVS condition by decreasing CPH voltage to increase dead time. If ZVS fails and CPH goes below 2V, even though the dead time reaches its maximum value, FAN7710V shuts off the IC to protect against damage. To restart FAN7710V, VDD must be below VDDTH(ST-) to reset an internal latch circuit, which remembers the status of the IC.

6V5V

3V2V

Active ZVS activated

AutomaticShutdown

Preheating period(Filament warm-up)

Ignition period

Running mode

Active ZVS mode

CPH

VDD

VDDTH(ST+)

VDDTH(ST-)

OUT

time

time

time0V

Shutdownmode

ShutdownRelease Restart

FAN7710 Rev. 1.00 Figure 31. CPH Voltage Variation During Open-Lamp

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5. Power Supply When VDD is lower than VDDTH(ST+), it consumes very little current, IST, making it possible to supply current to the VDD pin using a resistor with high resistance (Rstart in Figure 32). Once UVLO is released, the current consumption is increased and whole circuit is operated, which requires additional power supply for stable operation. The supply must deliver at least several mA. A charge pump circuit is a cost-effective method to create an additional power supply and allows CP to be used to reduce the EMI.

VDC

VB

OUT

PGND

VDD

RT

CPH

SGND

Charge pump

Dp1 Dp2

CVDD

CCP

(1)

(2) L CS

CPRL

dv/dt

Shuntregulator

FAN7710Rstart

VDC

FAN7710 Rev. 1.00

Figure 32. Local Power Supply for VDD Using a Charge-Pump Circuit

As presented in Figure 32; when OUT is HIGH, the inductor current and CCP create an output transition with the slope of dv/dt. The rising edge of OUT charges CCP. At that time, the current that flows through CCP is:

CPdv

I Cdt

≅ ×

(7)

This current flows along path 1 in Figure 32. It charges CVDD, which is a bypass capacitor to reduce the noise on the supply rail. If CVDD is charged over the threshold voltage of the internal shunt regulator, the shunt regulator turns on and regulates VDD with the trigger voltage.

When OUT is changing from HIGH to LOW state, CCP is discharged through Dp2, shown as path 2 in Figure 32. These charging/discharging operations are continued until FAN7710V is halted by shutdown operation. The charging current, I, must be large enough to supply the operating current of FAN7710V.

The supply for the high-side gate driver is provided by the boot-strap technique, as illustrated in Figure 33. When the low-side MOSFET connected between OUT and PGND pins is turned on, the charging current for VB flows through DB. Every low OUT gives the chance to charge the CB. Therefore, CB voltage builds up only when FAN7710V operates normally.

When OUT goes HIGH, the diode DB is reverse-biased and CB supplies the current to the high-side driver. At this time, since CB discharges, VB-VOUT voltage decreases. If VB-VOUT goes below VHSTH(ST-), the high-side driver cannot operate due to the high-side UVLO protection circuit. CB must be chosen to be large enough not to fall into UVLO range, due to the discharge during a half of the oscillation period, especially when the high-side MOSFET is turned on.

Dp1 Dp2

CVDD

Cp

L CS

CPRL

Rstart

CB

DB

Chraging path

VDC

Bootstrap circuit

VDC

VB

OUT

PGND

VDD

RT

CPH

SGND

FAN7710

FAN7710 Rev. 1.00

Figure 33. Implementation of Floating Power Supply Using the Bootstrap Method

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Design Guide

1. Startup Circuit The startup current (IST) has to be supplied to the IC through the startup resistor, Rstart. Once operation starts, the power is supplied by the charge pump circuit. To reduce the power dissipation in Rstart, select Rstart as high as possible, considering the current requirements at startup. For 220VAC power, the rectified voltage by the full-wave rectifier makes DC voltage, as shown in Equation 8. The voltage contains lots of AC component, due to poor regulation characteristic of the simple full-wave rectifier:

[ ] [ ]DCV 2 220 V 311V= × ≅ (8)

Considering the selected parameters, Rstart must satisfy the following equation:

( )DC DDTH STST

start

V VI

R+−

>

(9)

From Equation 9, Rstart is selected as:

( )DC DDTH STstart

ST

V VR

I+−

>

(10)

Note that if choosing the maximum Rstart, it takes a long time for VDD to reach VDDTH(st+). Considering VDD rising time, Rstart must be selected as shown in Figure 34. Another important concern for choosing Rstart is the available power rating of Rstart. To use a commercially available, low-cost 1/4Ω resistor, Rstart must obey the following rule:

( )2DC CL

start

V V 1W

R 4[ ]

−<

(11)

Assuming VDC=311V and VCL=15V, the minimum resistance of Rstart is about 350kΩ.

When the IC operates in shutdown mode due to thermal protection, open-lamp protection, or hard-switching protection; the IC consumes shutdown current, ISD, which is larger than IST. To prevent restart during this mode, Rstart must be selected to cover ISD current consumption. The following equation must be satisfied:

( )DC DDTH STstart

SD

V VR

I+−

>

(12)

From Equations 10 - 12; it is possible to select Rstart:

(1) For safe startup without restart in shutdown mode:

( ) ( )2 DC DDTH STDC CL start

SD

V V4 V V R

I+−

− < <

(13)

(2) For safe startup with restart from shutdown mode:

( ) ( )DC DDTH ST DC DDTH STstart

SD ST

V V V VR

I I+ +− −

< <

(14)

If Rstart meets Equation 14, restart operation is possible. However, it is not recommended to choose Rstart at that range since VDD rising time could be long and increase the lamp's turn-on delay time, as depicted in Figure 34.

FAN7710 Rev. 1.00

VCL

VDDTH(ST+)

VDDTH(ST-)

VDD

time

tstart

0

Figure 34. VDD Build-up

Figure 35 shows the equivalent circuit for estimating tstart. From the circuit analysis, VDD variation versus time is given by:

( )( )/( )( ) start VDDt R CDD DC start STV t V R I 1 e− ⋅= − ⋅ −

(15)

where CVDD is the total capacitance of the bypass capacitors connected between VDD and GND.

From Equation 15, it is possible to calculate tstart by substituting VDD(t) with VDDTH(ST+):

DC start ST DDTH STstart start VDD

DD start ST

V R I Vt R C

V R I( )ln +− ⋅ −

= − ⋅ ⋅− ⋅

(16)

In general, Equation 16 can be simplified as:

( )

( )

start VDD DDTH STstart

DC start ST DDTH ST

R C Vt

V R I V+

+

⋅ ⋅≈

− ⋅ −

(17)

Accordingly, tstart can be controlled by adjusting the value of Rstart and CVDD. For example, if VDC=311V, Rstart=560kΩ, CVDD=10µF, Ist=120µA, and VDDTH(ST+)= 13.5V; tstart is about 0.33s.

VDD

SGND

RSTART

CVDD

IST

Figure 35. Equivalent Circuit During Startup

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2. Current Supplied by Charge Pump For the IC supply, the charge pump method is used in Figure 36. Since CCP is connected to the half-bridge output, the supplied current by CCP to the IC is determined by the output voltage of the half-bridge.

When the half-bridge output shows rising slope, CCP is charged and the charging current is supplied to the IC. The current can be estimated as:

DCCP CP

VdVI C C

dt DT= ≈

(18)

where DT is the dead time and dV/dt is the voltage variation of the half-bridge output.

When the half-bridge shows falling slope, CCP is discharged through Dp2. Total supplied current, Itotal, to the IC during switching period, t, is:

total CP DCI I DT C V= ⋅ = ⋅ (19)

From Equation 19, the average current, Iavg, supplied to the IC is obtained by:

total CP DCavg CP DC

I C VI C V f

t t

⋅= = = ⋅ ⋅

(20)

For stable operation, Iavg must be higher than the required current. If Iavg exceeds the required current, the residual current flows through the shunt regulator implemented on the chip, which can cause unwanted heat generation. Therefore, CCP must be selected considering stable operation and thermal generation.

For example, if CCP=0.5nF, VDC=311V, and f=50kHz, Iavg is ~7.8mA; it is enough current for stable operation.

VDC

To VDDCCP Dp1

Dp2CVDD

Idp1

f=1/t

Half-bridge output

Idp1

Dp1

Dp2

Idp1=0

DT:dead time

Charging mode Discharging mode

To VDD

CVDD

CCP

FAN7710 Rev. 1.00 Figure 36. Charge Pump Operation

3. Lamp Turn-On Time The turn-on time of the lamp is determined by supply build-up time tstart, preheating time, and ignition time; where tstart has been obtained by Equation 17. When the IC's supply voltage exceeds VDDTH(ST+) after turn-on or restart, the IC operates in preheating mode. This operation continues until CPH pin's voltage reaches ~3V. In this mode, CPH capacitor is charged by IPH current, as depicted in Figure 37. The preheating time is achieved by calculating:

]onds[secI

CPH3t

PHpreheat

×= (21)

The preheating time is related to lamp life (especially filament). Therefore, the characteristics of a given lamp should be considered when choosing the time.

CPH

SGND

CPH

IPH

Figure 37. Preheating Timer

Compared to the preheating time, it is almost impossible to exactly predict the ignition time, whose definition is the time from the end of the preheating time to ignition. In general, the lamp ignites during the ignition mode. Therefore, assume that the maximum ignition time is the same as the duration of ignition mode, from 3V until CPH reaches 5V. Thus, ignition time can be defined as:

( )ignitionIG IG

CPH CPHt 5 3 2

I I= − =

(22)

Note that in ignition mode, CPH is charged by IIG, which is six times larger than IPH. Consequently, total turn-on time is approximately VDD Build-Time + Preheating Time + Ignition Time, or:

( ) ]onds[secI

CPH2

I

CPH35t

IGIGignition =−= (23)

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Component List for 20W CFL Application (3)

Part Value Note Part Value Note

Resistor Diode

R1(4) 470kΩ 0.25W D1 1N4007 1kV, 1A

R2 90kΩ 0.25W, 1% D2 1N4007 1kV, 1A

Capacitor D3 1N4007 1kV, 1A

C1 10μF/400V Electrolytic Capacitor, 105°C D4 1N4007 1kV, 1A

C2(5) 10μF/50V Electrolytic Capacitor, 105°C D5 UF4007 1kV, 1A

C3 100nF/25V Miller Capacitor D6 UF4007 1kV, 1A

C4 470pF/500V Ceramic Capacitor D7 UF4007 1kV, 1A

C5(6) 680nF/25V Miller Capacitor, 5% IC

C6(7) 2.7nF/1kV Miller Capacitor IC FAN7710V Ballast IC

C7(7) 33nF/630V Miller Capacitor

Inductor

L2(7) 2.5mH EE1916S,280T

Notes: 3. Refer to the Typical Application Circuit for 3U type CFL lamp provided in Figure 1. 4. Refer to the Design Guide startup circuit in Figure 35. Due to reducing power loss on the startup resistor (R1) for

high-efficiency systems, it is possible to use a higher resistor value than recommended. In this case, the IC doesn’t reliably keep SD (shutdown) state for protection. Carefully select the startup resistor (R1) or use the recommended value (470k) to sufficiently supply shutdown current (ISD) and startup current (IST).

5. Normally, this component could be changed to a normal miller capacitor to increase system reliability instead of the electrolytic capacitor with high temperature characteristics.

6. Temperature dependency of the capacitance is important to prevent destruction of the IC. Some capacitors show capacitance degradation in high temperatures and cannot guarantee enough preheating time to safely ignite the lamp during the ignition period at high temperatures. If the lamp does not ignite during the ignition period, the IC cannot guarantee ZVS operation, Thus, the peak current of the switching devices can be increased above allowable peak current level of the switching devices. Especially in high temperatures, the switching device can be easily destroyed. Consequently, CPH capacitor (C5) must be large enough to warm the filaments of the lamp up over the concerning temperature range.

7. Consider the components (L2, C6, C7) of resonant tank variation over the concerning temperature range. Normally, these components would be changed toward increasing inductance and capacitance in high temperature. That means that the resonant frequency is decreased. In the lower resonant frequency condition, the preheating current reduces, so the resonant tank cannot supply enough to preheat the filaments before lamp turn on. If the preheating current is insufficient, the ignition voltage / current is increased. Check the ignition current in high temperature: the current capacity of internal MOSFETs on IC must be larger than ignition current.

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Physical Dimensions

5.08 MAX

0.33 MIN

2.54

7.62

0.560.355

1.651.27

3.6833.20

3.603.00

6.676.096

9.839.00

7.62

9.9577.87

0.3560.20

NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO

JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS.

D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994

8.2557.61

E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.

(0.56)

Figure 38. 8-Lead, Dual Inline Package (DIP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.

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