Design for Testing

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Design For Testing (DFT)

M.Venugopal Reddy,

IIISem - ME(CIM)

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What is Testability?

Testability can best be described as the ease with which the functionality of any electronic product circuit or component can be determined to a desired degree of accuracy.

Testability is not a technological innovation. It is a mindset that creates a constant awareness of the importance of ease-of-testing ... In engineering ... during production ... in the field.

Testability is critical to the manufacturing process -- a product that cannot be readily tested is not really manufacturable.

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DFT refers to a class of design methods that Put constraints on the design process to make testgeneration and diagnosis simpler and easier, therebyoptimizing test related product costs. DFx (Design for X (T, M, etc.) or eXcellence) refers

tomethodologies, techniques and work practices thatcause a product to be designed and manufactured forthe optimum manufacturing cost, optimum quality andthe optimum achievement of lifecycle support.

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The tests generally are driven by test programs that execute in Automatic Test Equipment (ATE) or, in the case of system maintenance, inside the assembled system itself. In addition to finding and indicating the presence of defects (i.e., the test fails), tests may be able to log diagnostic information about the nature of the encountered test fails. The diagnostic information can be used to locate the source of the failure.

DFT plays an important role in the development of test programs and as an interface for test application and diagnostics

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Before Design for Testability (DFT)

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Design for Testability (DFT)

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Why Design for Test?

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Testability, is introduced at the design stage, where it dramatically lowers the cost of test and the time spent at test. Properly managed, testability heightens your assurance of product quality and smoothens production scheduling.

There are basically two approaches to test

1. Functional 2. In-circuit test

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Functional Test -- Verifying the Entire Board

Functional test is characterized by powering up the board and the application of input stimuli and measurement of the output signals on the circuit board. The measured output is compared against an expected result.

Functional test is aimed at verifying the functionality of the entire board. Functional test systems can be executed effectively at the speed of the design.

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In-Circuit Test -- Verifying the Components and the Assembly Process.

In-circuit test is characterized by not powering up the board, but applying stimuli and measurement of the signal nodes on the circuit board.

In-circuit test is best described as testing the functionality of each component on the board, with the inference that the overall board functionality can be verified by the fact that each component functions and that it is wired properly.

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Design for Testability – Examples of Rules

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Circuit Board Design Files.

If possible, designer has to create a layer in the circuit board design files for test points and tooling pins. This will allow the creation of a Gerber file specifically for the test pads and tooling pins.

Example: file name of test.gbr. Although this is not necessary, it helps speed fixture design and reduce costs and the potential for fixture fabrication error.

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optical

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Bed-of-Nails Interface

Mechanical board handlers may need as much as 0.138" clearance from components and 0.125“ clearance from test pads to provide room for conveyor rails.

• Tooling holes – 3 Preferred – Minimum 2 diagonally

opposed – Accuracy 0.002” – Diameter 0.128”– >0.125” from edge – Not obscured

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Test Point Placement

• All located on single side of board if possible• Even distribution• Minimum of one test point per Net• Close as possible to signal source• One test point on each unused IC pin• One test point on each pin of ‘spare’ IC

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Test Pad

• Preferred: d ≥0.085" (allows use of 100 mil technology probes)

• Acceptable: 0.085" > d ≥ 0.070" (75 mil technology probes)

• Limited use: 0.070'' > d ≥ 0.050'' (50 mil technology probes)

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Test Pad Spacing

• Minimum 0.200” from tooling pin• It is preferred to have at least 0.050" distance

from the edge of an test pad to the closest point on a component.

• It is required to have at least 0.030" distance from the edge of a test pad to the closest point on a component unless the high is greater than 0.100” in which case 0.050” is required

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Power Requirements

• Maximum of 2 amps per 0.100” probe with twice the number of returns.

• Distributed evenly over the boards• Minimum of 10 power and 20 ground connections• Note:– Ground loops are a major problem in fixtures. Keep

multiple ground planes connected using copper brand to minimize ground loop effects.

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Physical Design for Testability

• Board labeling• Consistent text orientation• Board type, revision & serial number clearly

marked on top-side• Barcode label on top-side and consistent• Component identities visible and adjacent to

component with lines as necessary

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Electrical Design for Testability

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Power Distribution

While the current handling capacity of standard probes is 1 amp, a practical limitation of 1/2 amp will guarantee more efficient probe performance and reliable power distribution.

Power distribution should take place across the entire board with at least three test points for the first amp and another test point for an additional 1/2 amp.

Additional test points must be included for power supply sense lines, as well as grounds and returns, especially in digital logic testing.

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Digital DFT - Controlling Timing

Typically on-board clocks must be disabled to effectively test the rest of the circuit Clock sources must be controllable from the tester.

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Digital DFT - Enabling Test

•External control or output lines must not be tied directly to ground or to the VCC. Otherwise, it's impossible to use available test library elements easily, leading to a more complex and more costly test routine.

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Digital DFT - Separate Resets & Enables

Similarly, separate reset, control, and enable lines must not be tied through a common resistor as this prohibits independent testing of each device.

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Some Do’s for Electrical Testability

• Make devices easily initializable• Permit outputs to be tri-stated• Use resistors to tie inputs• Use synchronous designs• Use “static” designs• Permit disabling of on-board clocks• Allow access to all unused device pins• Use boundary Scan

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Thank you