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De-synchronization: De-synchronization: from synchronous to from synchronous to asynchronous asynchronous Based on the paper: Based on the paper: Blunno, Cortadella, Kondratyev, Lavagno, Blunno, Cortadella, Kondratyev, Lavagno, Lwin, Sotiriou, Lwin, Sotiriou, Handshake protocols for de-synchronization, Handshake protocols for de-synchronization, ASYNC 2004. ASYNC 2004.
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De-synchronization: from synchronous to asynchronous

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De-synchronization: from synchronous to asynchronous. Based on the paper: Blunno , Cortadella, Kondratyev , Lavagno , Lwin , Sotiriou , Handshake protocols for de-synchronization, ASYNC 2004. Outline. What is de-synchronization ? Behavioral equivalence - PowerPoint PPT Presentation
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Page 1: De-synchronization: from synchronous to asynchronous

De-synchronization:De-synchronization:from synchronous to asynchronousfrom synchronous to asynchronous

Based on the paper:Based on the paper:Blunno, Cortadella, Kondratyev, Lavagno, Lwin, Sotiriou,Blunno, Cortadella, Kondratyev, Lavagno, Lwin, Sotiriou,Handshake protocols for de-synchronization,Handshake protocols for de-synchronization,ASYNC 2004. ASYNC 2004.

Page 2: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 3: De-synchronization: from synchronous to asynchronous

Synchronous

CLK

AsynchronousDe-synchronize

CLK

Page 4: De-synchronization: from synchronous to asynchronous

MS flip-flop

Synchronous circuit

CLK

L L L L

L L

0 0

00

1 1

Page 5: De-synchronization: from synchronous to asynchronous

De-synchronization

L L L L

L L

0 0

00

1 1

C C C C

C C

Page 6: De-synchronization: from synchronous to asynchronous

De-synchronization

C C C C

C C

Distributed controllers substitute the clock network

The data path remains intact !

Page 7: De-synchronization: from synchronous to asynchronous

Design flow

Think synchronousThink synchronous

Design synchronous:Design synchronous:one clock and edge-triggered flip-flopsone clock and edge-triggered flip-flops

De-synchronize (automatically)De-synchronize (automatically)

Run it asynchronouslyRun it asynchronously

Page 8: De-synchronization: from synchronous to asynchronous

Prior work Micropipelines (Sutherland, 1989)Micropipelines (Sutherland, 1989)

Local generation of clocksLocal generation of clocks Varshavsky et al., 1995Varshavsky et al., 1995 Kol and Ginosar, 1996Kol and Ginosar, 1996

Theseus Logic (Ligthart et al., 2000)Theseus Logic (Ligthart et al., 2000) Commercial HDL synthesis toolsCommercial HDL synthesis tools Direct translation and special registersDirect translation and special registers

Phased logic (Linder and Harden, 1996)Phased logic (Linder and Harden, 1996) (Reese, Thornton, Traver, 2003) (Reese, Thornton, Traver, 2003) Conceptually similarConceptually similar Different handshake protocol (2 phase vs. 4 phase)Different handshake protocol (2 phase vs. 4 phase)

Page 9: De-synchronization: from synchronous to asynchronous

Automatic de-synchronization

Devise an Devise an automaticautomatic methodmethod for forde-synchronizationde-synchronization

Identify a Identify a subclass of synchronous circuitssubclass of synchronous circuits suitable for de-synchronizationsuitable for de-synchronization

Formally prove correctnessFormally prove correctness

Page 10: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 11: De-synchronization: from synchronous to asynchronous
Page 12: De-synchronization: from synchronous to asynchronous
Page 13: De-synchronization: from synchronous to asynchronous

Synchronous flow

Page 14: De-synchronization: from synchronous to asynchronous
Page 15: De-synchronization: from synchronous to asynchronous
Page 16: De-synchronization: from synchronous to asynchronous
Page 17: De-synchronization: from synchronous to asynchronous
Page 18: De-synchronization: from synchronous to asynchronous
Page 19: De-synchronization: from synchronous to asynchronous
Page 20: De-synchronization: from synchronous to asynchronous
Page 21: De-synchronization: from synchronous to asynchronous
Page 22: De-synchronization: from synchronous to asynchronous
Page 23: De-synchronization: from synchronous to asynchronous
Page 24: De-synchronization: from synchronous to asynchronous

De-synchronized flow

Page 25: De-synchronization: from synchronous to asynchronous
Page 26: De-synchronization: from synchronous to asynchronous

++

Page 27: De-synchronization: from synchronous to asynchronous
Page 28: De-synchronization: from synchronous to asynchronous
Page 29: De-synchronization: from synchronous to asynchronous
Page 30: De-synchronization: from synchronous to asynchronous
Page 31: De-synchronization: from synchronous to asynchronous
Page 32: De-synchronization: from synchronous to asynchronous
Page 33: De-synchronization: from synchronous to asynchronous
Page 34: De-synchronization: from synchronous to asynchronous
Page 35: De-synchronization: from synchronous to asynchronous
Page 36: De-synchronization: from synchronous to asynchronous
Page 37: De-synchronization: from synchronous to asynchronous

Flow equivalence

[Guernic, Talpin, Lann, 2003][Guernic, Talpin, Lann, 2003]

Page 38: De-synchronization: from synchronous to asynchronous

AA

BB

Page 39: De-synchronization: from synchronous to asynchronous

Flow equivalence

CLKA 1 3 0 2 1 5 3 1 6 0B 5 1 2 3 1 4 2 4 3 1

A 1 3 0 2 1 5 3 1 6 0

B 5 1 2 3 1 4 2 4 3 1

Synchronous behavior

De-synchronized behavior

Page 40: De-synchronization: from synchronous to asynchronous

Flow equivalence

CLKA 1 3 0 2 1 5 3 1 6 0B 5 1 2 3 1 4 2 4 3 1

A 1 3 0 2 1 5 3 1 6 0

B 5 1 2 3 1 4 2 4 3 1

Synchronous behavior

De-synchronized behavior

Page 41: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 42: De-synchronization: from synchronous to asynchronous

L L L L

L L

0 0

00

1 1

C C C C

C C

Page 43: De-synchronization: from synchronous to asynchronous

C C C C

C C

Page 44: De-synchronization: from synchronous to asynchronous

C

L

Page 45: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

A latch cannot read another data item untilthe successor has captured the current one

Page 46: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 1 0 0

A latch cannot read another data item untilthe successor has captured the current one

Page 47: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

A latch cannot read another data item untilthe successor has captured the current one

Page 48: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

1 0 0 0

A latch cannot read another data item untilthe successor has captured the current one

Page 49: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

Page 50: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 1

Page 51: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

Page 52: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 1 0

A latch cannot become opaque before havingcaptured the data item from its predecessor

Page 53: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 1 1 0

A latch cannot become opaque before havingcaptured the data item from its predecessor

Page 54: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 1 0

A latch cannot become opaque before havingcaptured the data item from its predecessor

Page 55: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

A latch cannot become opaque before havingcaptured the data item from its predecessor

Page 56: De-synchronization: from synchronous to asynchronous

A B C D

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

A- B+ C- D+

A+ B- C+ D-

0 0 0 0

Page 57: De-synchronization: from synchronous to asynchronous

A B C D

A+ B+ C+ D+

A- B- C- D-

A

B

Page 58: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 59: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

Can we increase concurrency ?

A+ B+

A- B-

A+ B+

A- B-

not flow-equivalent

Page 60: De-synchronization: from synchronous to asynchronous

A

B

A

B

data overrun

A

B

data lost

Page 61: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

Can we reduce concurrency ? How much ?Can we reduce concurrency ? How much ?

Page 62: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-

(8 states)

(6 states)

A+ B+

A- B-

(5 states)

A+ B+

A- B-

A+ B+

A- B-

(4 states)

Page 63: De-synchronization: from synchronous to asynchronous

A

B

A

B

A

B

A

B

A

B

A

B

fully decoupledfully decoupled(Furber & Day)(Furber & Day)

simple 4-phasesimple 4-phase

semi-decoupledsemi-decoupled(Furber & Day)(Furber & Day)

non-overlappingnon-overlapping

GasP, IPCMOSGasP, IPCMOS

de-synchronizationde-synchronizationmodelmodel

Page 64: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-

A+ B+

A- B-

simple 4-phasesimple 4-phase non-overlappingnon-overlapping

semi-decoupledsemi-decoupled(Furber & Day)(Furber & Day)

fully decoupledfully decoupled(Furber & Day)(Furber & Day)

GasP, IPCMOSGasP, IPCMOS

de-synchronizationde-synchronizationmodelmodel

Page 65: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Furber and Day, IEEE Trans. VLSI, June 1996

Implementation note: Lt=0 (transparent), Lt=1 (opaque)

Rin RinRout Rout

Aout AoutAin Ain

Lt Lt

Page 66: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin Rout

AoutAin

Lt

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

?Lt+

Lt-

Page 67: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin Rout

AoutAin

Lt

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

Simple 4-phase controller

Page 68: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

Simple 4-phase controller

Page 69: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin Rout

AoutAin

Lt

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

A+

A-

Semi-decoupled controller

Page 70: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

A+

A-

Semi-decoupled controller

Page 71: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin Rout

AoutAin

Lt

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

A+

A-

Fully decoupled controller

B+

B-

Page 72: De-synchronization: from synchronous to asynchronous

4-phase latch controllers

Rin+

Ain+

Rin-

Ain-

Rout+

Aout+

Rout-

Aout-

Lt+

Lt-

A+

A-

Fully decoupled controller

B+

B-

Page 73: De-synchronization: from synchronous to asynchronous

4-phase latch controllers (state graphs)

Fully decoupled controllerSemi-decoupled controller

Page 74: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

Ri+ A- Rx+ B- Ro+

Ai+ Ax+ Ao+

Ri- A+ Rx- B+ Ro-

Ai- Ax- Ao-(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 75: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 76: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 77: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 78: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 79: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 80: De-synchronization: from synchronous to asynchronous

A B

cntrl cntrlRi

Ai

Rx

AxRo

Ao

A- B-

A+ B+

(semi-decoupled 4-phase protocol)(semi-decoupled 4-phase protocol)

Page 81: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-

A+ B+

A- B-

Page 82: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 83: De-synchronization: from synchronous to asynchronous
Page 84: De-synchronization: from synchronous to asynchronous

Which protocols are validWhich protocols are validfor de-synchronization ?for de-synchronization ?

Page 85: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

Theorem: the de-synchronization protocol preserves flow-equivalence

Proof: by induction on the length of the traces

Induction hypothesis: same latch values at reset Induction step: same values at cycle i same values at cycle i+1

Page 86: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-

A+ B+

A- B-

Page 87: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-

A+ B+

A- B-

Theorem: any reduction in concurrency preserves flow-equivalence

Page 88: De-synchronization: from synchronous to asynchronous

Any hybrid approach preservesAny hybrid approach preservesflow-equivalence !flow-equivalence !

Semi-Semi-decoupleddecoupled

Semi-Semi-decoupleddecoupled

Semi-Semi-decoupleddecoupled

non-non-overlappingoverlapping

non-non-overlappingoverlapping

FullyFullydecoupleddecoupled

FullyFullydecoupleddecoupled

Page 89: De-synchronization: from synchronous to asynchronous

A B C D

A+ B+ C+ D+

A- B- C- D-

Page 90: De-synchronization: from synchronous to asynchronous

A B C D

A+ B+ C+ D+

A- B- C- D-semi-semi-

decoupleddecouplednon-non-

overlappingoverlappingfullyfully

decoupleddecoupled

Flow-equivalence is preserved, … but …

Page 91: De-synchronization: from synchronous to asynchronous

Liveness

Preservation of flow-equivalence:Preservation of flow-equivalence:

all the generated traces are equivalentall the generated traces are equivalent

Are all traces generated ?Are all traces generated ?(Is the marked graph live ?)(Is the marked graph live ?)

Not always !Not always !

Page 92: De-synchronization: from synchronous to asynchronous

A+ B+ C+ D+

A- B- C- D-

Liveness: all cycles have at least one token [Commoner 1971]

Semi-decoupled 4-phase handshake protocolSemi-decoupled 4-phase handshake protocol

Page 93: De-synchronization: from synchronous to asynchronous

A+ B+ C+ D+

A- B- C- D-

Simple 4-phase handshake protocolSimple 4-phase handshake protocol

Page 94: De-synchronization: from synchronous to asynchronous

Results about liveness

At least three latches in a ring are required with At least three latches in a ring are required with only one data token circulatingonly one data token circulating[[Muller 1962Muller 1962]]

Theorem (this paper): (this paper):any hybrid combination of protocols is live if the any hybrid combination of protocols is live if the simple 4-phase protocol is not usedsimple 4-phase protocol is not used

Proof: any cycle has at least one token any cycle has at least one token

Page 95: De-synchronization: from synchronous to asynchronous

A+ B+

A- B-

A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-A+ B+

A- B-

A+ B+

A- B-

simple 4-phasesimple 4-phase non-overlappingnon-overlapping

semi-decoupledsemi-decoupled(Furber & Day)(Furber & Day)

fully decoupledfully decoupled(Furber & Day)(Furber & Day)

GasP, IPCMOSGasP, IPCMOS

de-synchronizationde-synchronizationmodelmodel

Page 96: De-synchronization: from synchronous to asynchronous

Outline

What is de-synchronization ?What is de-synchronization ? Behavioral equivalenceBehavioral equivalence 4-phase protocols for de-synchronization4-phase protocols for de-synchronization ConcurrencyConcurrency CorrectnessCorrectness An exampleAn example

Page 97: De-synchronization: from synchronous to asynchronous
Page 98: De-synchronization: from synchronous to asynchronous

Async DLX block diagram

Page 99: De-synchronization: from synchronous to asynchronous

Synchronous RTL

=

Synchronous Desynchronized

Cycle: 4.4nsPower: 70.9mWArea: 372,656m

Cycle: 4.45nsPower: 71.2mWArea: 378,058m

All numbers are after Placement & RoutingAll numbers are after Placement & Routing Total of 1500 flip-flops, 3000 latchesTotal of 1500 flip-flops, 3000 latches DE-SYNC design includes 5 controllers, each driving 2 clock treesDE-SYNC design includes 5 controllers, each driving 2 clock trees Power numbers include the clock tree Power numbers include the clock tree Technology: UCM/Virtual Silicon 0.18 Technology: UCM/Virtual Silicon 0.18 µµmm

Page 100: De-synchronization: from synchronous to asynchronous

Discussion

The de-synchronization model provides an The de-synchronization model provides an abstraction of the timing behaviorabstraction of the timing behavior

Page 101: De-synchronization: from synchronous to asynchronous

[2,3]

[1,2] [8,9]

[5,7]

[3,5]

[2,4]

A B E

F

GC

D

[0,0] [3,5] [3,5]

[5,7][2,3]

[2,3]

[2,4

]

[1,2]

[8,9

]

[1,2

]

• Timing analysis• Exploration of the design space

Page 102: De-synchronization: from synchronous to asynchronous

Conclusions

EDA tools require a EDA tools require a formal supportformal support(they must work for (they must work for allall circuits) circuits)

A complete characterization of 4-phase protocols A complete characterization of 4-phase protocols has been presentedhas been presented(partial order based on concurrency)(partial order based on concurrency)

Design flow developed at Cadence Berkeley LabsDesign flow developed at Cadence Berkeley Labs Automated from gate netlistAutomated from gate netlist Static timing analysis to derive matched delaysStatic timing analysis to derive matched delays Constrained P&R to meet timing constraintsConstrained P&R to meet timing constraints