bldc controlador atmel

Fully Integrated BLDC Motor Control

Application Note

4987A–AUTO–03/07

Fully Integrated BLDC Motor Controlfrom the Signal Generation to the Full BLDC

Motor Control Chain

1. DescriptionThe purpose of this document is to explain the theory and application of Atmel®’s inte-grated BLDC driver solution. The worldwide demand for BLDC systems is increasingrapidly. To fulfill this need, Atmel provides a BLDC system with integrated outputstages up to 1A. The system is suitable for “under the hood” applications with ambienttemperatures up to 150°C. Various built-in protection features make it ideal for a vari-ety of automotive applications containing small motors.

Figure 1-1. Fully Integrated BLDC Motor Control

2. Fully Integrated BLDC System

Figure 2-1. Fully Integrated BLDC Motor Control Application

The system consists of three integrated circuits: Microcontroller ATmega88, Triple Half BridgeDriver ATA6832 and LIN System Basis Chip ATA6624 (Figure 2-1). The driver IC integratesthree half bridges to run a BLDC motor directly.

The output drivers are fully protected. Open load, overtemperature, overload, and undervolt-age will be reported to the microcontroller by SPI (Serial Peripheral Interface). The outputs willalso be switched with the SPI interface. The direct PWM input is independent of the SPI andcan be flexibly linked to the 6 output stages. This ensures an intelligent cruise control for vari-ous movement profiles adapted to the load.

The loop between motor movement and microcontroller is assured by hall sensors. The com-mutation is done by the microcontroller ATmega88. Furthermore, ATmega88’s flash memoryand computing capacity allow operation of LIN protocol 2.0.

The BLDC system is connected with the LIN transceiver ATA6624 to the automotive environ-ment. Furthermore, this device generates the digital supply voltage.

No additional protection circuitry, e.g. current sensing is required due the enhanced in-circuitprotection features for overload and overtemperature.

Protection

Diagnosis

BLDCMotor

W

U

VVCC

Battery

LIN

RxTx

SPI, PWM

HALL

Watchdog

Commutation

Speed Control

LIN

TRX

VCCRegulator

ATA6832

ATA6624

ATmega88

16 Bit SPI, PWM

Charge Pump

24987A–AUTO–03/07



3. Theory of BLDC OperationBrushless DC motors are used in a growing number of applications as they offer severaladvantages, including reduced noise, long lifetime (no brush erosion), reduced noise, goodweight/size to power ratio, and hazardous operation environment usability (with flammableproducts).

These types of motor have a little rotor inertia compared with other motor types. Coils areattached to the stator, and commutation is controlled by electronics using position sensorsfeedback or back electromotive force measurements.

A BLDC motor stator basically includes three coils, which can be replicated to reduce torqueripple. In the same way, a rotor basically includes permanent magnets, composed of one tomultiple pair of poles; this also affects step size (see Figure 3-1). Position can be estimatedusing three hall sensors, each spread at 120° around the stator.

Figure 3-1. Three-coil BLDC Motor, 1 and 2 Pair Poles

BLDC motor operation can be simplified by considering only three coils and one pair pole. Thecommutation of the phase depends on the position, in our case, the hall sensors value. Whenmotor coils are supplied, a magnetic field is created and the rotor moves. The most elemen-tary commutation driving method is an on-off scheme: a coil is either conducting or not. Onlytwo coils are supplied at the same time; the third is floating. This is referred to as trapezoidalcommutation or block commutation.

Figure 3-2. Power Stage

NS

A

BC

N

NS S

C B

A

BC

HS1 HS2

A

HS3

LS1 LS2 LS3

34987A–AUTO–03/07

Figure 3-3. Commutation Steps for CW Operation

Reading the hall sensors value indicates commutation to be performed. For multiple polemotors, electrical rotation corresponds to mechanical rotation with the pair pole number factor.

Commutations are updated at each step to create a rotating magnetic field as shown in Figure3-3.

This method takes full advantage of the ATA6832 as commutations can be transmitted at eachstep, while PWM allows magnetic field magnitude tuning to act independently on motor torqueand speed.

A

BC

110

010

100

101

001

011

A

BC

A

BC

A

BC

A

BC

A

BC

Step 1 Step 2 Step 3

Step 4 Step 5 Step 6

Table 3-1. Switches Commutation for CW and CCW Rotation

Hall Sensors Value (CBA)

Switches Commutation for CW Rotation

Switches Commutation for CCW Rotation

Coils Switches Coils Switches

101 A - B HS1 - LS2 B - A HS2 - LS1

001 A - C HS1 - LS3 C - A HS3 - LS1

011 B - C HS2 - LS3 C - B HS3 - LS2

010 B - A HS2 - LS1 A - B HS1 - LS2

110 C - A HS3 - LS1 A - C HS1 - LS3

100 C - B HS3 - LS2 B - C HS2 - LS3

44987A–AUTO–03/07



4. Driver ATA6832The ATA6832 offers a variety of diagnostic and protection features including supervised lowbattery voltage, overload, open load, and temperature monitoring.

4.1 Maximum SpeedThe commutation is done by microcontroller. The hall sensors are the input channel, whichprovide the motor position feedback. The SPI interface, which is the interface to the integratedtriple half-bridge driver, is the output channel. The time schedule for commutation is shown inFigure 6-1 on page 10.

The data transfer rate of the SPI is restricted; 2 MHz is the maximum transfer rate to theATA6832. 16 bit plus communication control allows a maximum theoretical SPI rate of up to100 kHz – one command every 10 µs.

The maximum output switch speed of the ATA6832 is up to 25 kHz. Changing the output stateis possible every 40 µs.

A BLDC motor with a 3-pole stator and one double pole enables, with a defined control, themaximum speed. A rotor with two double poles enables half the speed. A single double-polemotor in one rotation passes through 6 different switching states of the three output halfbridges (refer to Table 3-1 on page 4). Each switching state is controlled by one SPI com-mand; therefore, six SPI commands are required for one turn.

An output switch rate of 40 µs and 6 times each turn results in a minimum of 240 µs for onerotation.

4.2 Open BLDC Load DetectionTo detect the open load, there are integrated current sources on each output stage. Turningoff open-load detection bit (OLD set to low), the current sources are switched on. The low sidetest current is guaranteed by design to be higher than high side test current. Therefore, if noload is connected to an output, all the three low-side switches will report open load by turningtheir output register bit on.

If one output is switched to high and the BLDC motor is connected correctly, both neighboringoutputs will show high-side open load. In the event of open load on one string, this output willsignal low-side open load.

Under normal operation, the open load current sources should be switched off by set-ting OLD bit to high. Otherwise, this circuitry will produce power dissipation.

54987A–AUTO–03/07

4.3 Switching PWM To control the outputs with PWM, there is one PWM input pin available for all six outputs. Theoutputs to operate with PWM can be selected by activating the corresponding bit of the sixinput data registers PLx/PHx. If PWM operation mode is activated for an output by these inputbits, its input data register switch HSx/LSx is “and-connected” with the input pin PWM. Theselected outputs follow the PWM input signal.

For cruise control, e.g., to start or stop a BLDC motor, PWM is necessary. To control thespeed, only one dedicated PWM for all three BLDC motor strings is required. Controlling thecurrent through the strings, it is sufficient to switch only one output of a half bridge, either highside or low side. This circumstance enables running of the BLDC driver with only one PWMfrequency. Only one microcontroller timer is necessary.

The high-side switches of the ATA6831 and ATA6832 are faster than the low-side switches.PWM frequency up to 25 kHz is possible using the high-side switches.

4.4 Cooling Area DesignThe drivers IC ATA6831/ATA6832 are housed in a special QFN package. QFN package isparticularly suitable for power package because of the exposed die pad. To make use of thisadvantage, it has to be assured the head slug is completely soldered to the PCB.

To reduce thermal resistance, vias are required down to the soldering layer. A sufficing groundplane has to be placed on the soldering layer to eliminate the thermal energy.

A via diameter of 0.3 mm to 0.4 mm and a spacing of 1 mm to 1.5 mm has proven to be mostsuitable. Some care should be taken of the copper area's planarity, in particular, any solderbumps arising at the thermal vias should be avoided.

To minimize package size down to 4 mm × 4 mm, pins are only on three sides of the package.

64987A–AUTO–03/07



5. The Application BoardThe application board is run capable when connected to 12V at connector LIN (see Figure 5-1on page 8). The board can be connected to the automotive environment over a LIN bus by aLIN clamp; however, there is no LIN protocol implemented in the microcontroller. TheATA6625 on this application board is used to generate a 5V digital supply.

A switch (DIR) for run/stop, clockwise, counterclockwise, and a potentiometer (SPEED) forvariable speed (PWM) input are available on the board for stand-alone prototyping.

The feedback loop from BLDC motor to microcontroller ATmega88 is done by hall sensors.The three hall inputs can be linked to the connector HALL as well as the 5V supply for the hallsensors

5.1 On-board FeaturesThe application board provides the following features:

• ATmega88 QFN32

– MCU

• ATA6832 QFN

– Integrated triple half bridges to drive BLDC motor and check its operations

• ATA6625 SO8

– 1 x LIN interface 1.3 and 2.0 compliant

– 5V power supply regulator

– Up to 125°C (Using an ATA6624 with an external transistor would allow up to 150°C operation)

• On-Off-On switch

– Stand-alone commands interface: Run/stop, clockwise, and counterclockwise.

• Potentiometer

– Stand-alone speed variation command (PWM ratio)

• System clock

– Internal RC oscillator

• Connectors

– Power supply (battery voltage) and LIN

– BLDC Motor connector (3 phase)

– Hall sensor inputs and supply (3 filtered inputs and 5V regulated supply voltage)

– ISP/debugWire connector, for on-chip in-situ Programming (ISP) and for on-chip debugging using JTAG ICE supported by AVR Studio® interface(1)

• Dimensions: 45 mm × 45 mm

Note: 1. The ATmega88 is supported by AVR Studio, version 4.12 or higher. For up-to-date informa-tion on this and other AVR® tool products, please consult our web site. The newest version of AVR Studio, AVR tools and this user guide can be found in the AVR section of the Atmel web site, http://www.atmel.com

74987A–AUTO–03/07

Figure 5-1. Application Board Top View and Connector Usage

5.2 High Ambient TemperatureThe BLDC system is designed for high temperature environments. The MCU ATmega88 andthe driver ATA6832 are qualified up to an ambient temperature of 150°C. The ATA6832 hasenhanced temperature management; each of its output stages contains a thermal sensor. Inaddition to the thermal shutdown function, a thermal prewarning function is available. If thetemperature exceeds the prewarning threshold, the microcontroller can react by reducing out-put power.

The SBC (system basis chip) ATA6625 is only qualified for junction temperatures up to 150°C.The power dissipation of its voltage regulator only allows for ambient temperature up to 125°C.ATA6624, a member of the same SBC family, allows operation with a discrete transistor forline regulation. Transistors are available for junction temperatures higher than 150°C. If such aline regulation transistor dissipates the heat, ATA6624’s temperature rise is only 3°C. Its pos-sible ambient temperature is 147°C. Using a high temperature voltage regulator instead ofAtmel’s SBC enables a full 150°C temperature range.

All discrete components used are enabled for temperatures up to 150°C.

Mounted connectors, a switch, and a potentiometer on the board, enable prototyping; how-ever, these components are not high temperature qualified. The board can be integrated in hottemperature environment by wires.

Vbat

Speed

CCW

Stop

CW

Phase U

Phase V

Phase W

5V

Hall A

Hall B

Hall C

GND

LINPGND

1 23 45 6

JP1MISOSCKNRES

ISP MK2 Header

MOSI

GND

VCC 5V

84987A–AUTO–03/07



6. Software DescriptionAll code is implemented in C language, except SPI interrupt subroutine, which is implementedin assembly. Source code can be compiled using IAR® EWAVR 4.20A as well as AVR-GCC(WinAVR-20060421 with AVR Studio).

HTML documentation is included in the package. Use the High_temp_BLDC.html file in theroot directory to start viewing the documentation.

Software behavior can be dispatched in three main working modes:

• Motor stopped

– In this mode, no hall sensors interrupts occurs. To maintain ATA6832 diagnostics, SPI communication is constantly performed by main loop.

– Command switch enables starting of the motor. A first frame has to be sent to the power driver to start the motor. This frame shall contain commutations to be applied according to motor position (hall sensors inputs) and to desired direction.

– While stopped, ATA6832 is switched into standby mode to decrease current consumption to lower than 20 µA.

• Motor running

– Once the motor is started, SPI communications (commutations), are only handled by hall sensors ISR, each time an interrupt occurs.

– Command switch can be used to break the commutations evolution, and thus stop the motor.

• Degraded mode: two possibilities

– Motor has been stopped because of an overload, an over temperature, etc. Software waits for the user to clear the fault (operate switch to stop position).

– Motor is still running (software behavior is similar to the motor running mode). User is informed that a fault has been detected (over temperature, one or more switches are secured, etc.). Software can reduce output power and waits for a user order to clear the fault (operate switch to stop position).

6.1 Resources

The following MCU peripherals are used:

• SPI

– Commutation data and status data transfer to/from ATA6832 power driver

• Timer 1

– PWM generation through Output Compare 1A (OC1A pin)

• ADC channel 0

– Speed potentiometer value acquisition (Acts on PWM ratio)

Table 6-1. Code, Data, and CPU Resources (Without Compiler Optimizations)

Compiler/Resources Code Size (Flash) Data Size (Ram) CPU Load

IAR EWAVR 4.20A 1 304 bytes 367 bytesSee §Schedule

AVR-GCC 1 826 bytes 48 bytes

94987A–AUTO–03/07

• Pin change interrupts

– Hall sensor edges detection are used to detect motor position evolution

• I/O

– LED, Switch operations

• Optional (not managed by this stand-alone software)

– UART and Input Capture for LIN implementation

6.2 Schedule

Figure 6-1. Software Schedule

CPU load while motor is running

• Using IAR EWAVR 4.20A

The main loop is continually executed in background. It could be scheduled. Main loopmeasured time cycle is 21 µs.

For each output commutation, one hall interrupt and two SPI interrupts occur. This makesfor one commutation:

CPU time = Hall ISR time + Both SPI ISR time = 8.4 µs + 4.8 µs = 13.2 µs/commutation.

• Using AVR-GCC

The main loop is continually executed in background. It could be scheduled. The main loopmeasured time cycle is 30 µs.

For each output commutation, one hall interrupt and two SPI interrupts occur. This makes forone commutation:

CPU time = Hall ISR time + Both SPI ISR time = 16 µs + 4.8 µs = 20.8 µs / commutation.

The main loop is not taken into account for CPU load computation below, as it is not sched-uled and executed in background. Assuming we have 6 interrupts for a complete motorrotation and a 4-pair pole motor, we can determine the following CPU load versus rotationspeed.

Hall Sensor ISR

Main Loop (Background)

SPI

Motor Stopped Motor Startup

Motor Start Order

Commutation Data Tx

CommutationNext

1st

Motor Running

104987A–AUTO–03/07



Figure 6-2. CPU Load versus Speed for an 8 Pole Motor

6.3 Diagrams

Figure 6-3. Flowchart for Hall Sensors ISR

Figure 6-4. Flowchart for SPI Transfer Completed ISR

0

1

2

3

4

5

6

7

8

0 2 0 0 0 4 0 0 0 6 0 0 0 8 0 0 0 10 0 0 0 12 0 0 0

RPM (Rotation Per Minute)%

CP

L

CPU IAR

CPU Avr GCC

ClockwiseRotation?

Read Hall Sensor Signals from Port C

Select Next CommutationState from CW Sequence

Pin Change Interrupt(Hall Sensor ISR)

Stop?Y

N

Y N

Transmit Commutation Data on SPI

Select Next CommutationState from CCW Sequence

Read Rx BufferStore to ATA6832 Status

Read Rx BufferStore to ATA6832 Status

SPI TransmitCompleted ISR

Both CommandBytes (16 bits) Sent?

Y N

Release Slave Select PinReport Transmit Completed

Write Tx BufferReport One Byte Transferred

114987A–AUTO–03/07

Figure 6-5. Main Loop Flowchart

Over Temperature?Overload ?

Under Voltage ?

Manage MotorStatus

Main Loop(Background)

Stop?

Start?Stopped?

N

N

Y

Initialize I/O, SPI, ADC, Hall Sensors ISR, Timer1-PWM, ATA6832

Set PWM Ratio According to ADC

Motor Status Stopped

Send SPI to ATA6832 Continuously

Refresh ATA6832 Status Buffer

Send Commutation CommandAccording to Position and Direction

Started CW? Y

Stop? Motor Status Stopped

Limit Output Power

Toggle LED

Over Temperature ?

Stop?Reset ATA6832

Set LED

Started CCW?

Y

Y

Y

Y

124987A–AUTO–03/07



6.4 Modules void SPI_MasterInit(void)

Initializes SPI used to access ATA6832, configures I/O, 2MHz frequency, data sample atclock falling edge, LSB first.

SPI_status_t SPI_transmit_16(unsigned int data_16)

Sends 16 bit data on SPI (using interrupts), depending on returned SPI status. ReturnsSPI_Initiate_tx status if successful.

SPI_status_t SPI_get_Rx_data(unsigned int *data_16_ptr)

Puts the SPI received data into pointed buffer when data has been received. In that case itreturns SPI_Completed status and changes SPI status to ready.

void ADC_Init(void)

Sets up ADC to acquire desired speed from potentiometer.

unsigned int get_speed()

Returns last acquired desired speed from potentiometer. Checks ADC end conversion flagto start new conversions and update latest desired speed.

void Hall_sensors_ISR_init(void)

Sets up pin change interrupts on hall sensor inputs.

Motor_ctrl_t BLDC_start(unsigned char direction)

Sends first commutation order to start motor according to desired direction and to hall sen-sors inputs. Returns started status when SPI frame has been emitted.

void Timer1_start(void)

Configures timer 1 for PWM on Output compare 1 A.

void manage_time_base(void)

Manages a general purpose time base (for LED toggling, etc.).

TIMER1_SET_OC1A_PWM(val)

Changes PWM ratio (macro).

134987A–AUTO–03/07

7. Application Board Full Description

Figure 7-1. BLDC Application Board Schematic

Hal

lC

Hal

lB

Hal

lA

Hal

l_C

R10

100Ω

SP

I_S

S

MIS

O

1

PD2(INT0/PCINT18)

PD1(TXD/PCINT17)

PD0(RXD/PCINT16)

PC5(ADC5/SCL/PCINT13)

PC2(ADC2/PCINT10)

PC3(ADC3/PCINT11)

PC4(ADC4/SDA/PCINT12)

PC6(RESET/PCINT14)

PD5(T1/OC0B/PCINT21)32

9

10

11

8

17

14

31

30

29

28

27

26

25

VS1

VS2

VCC

PGND2

PGND3

PGND1

GND

LIN_EN

LIN_TXD

LIN_RXD

LIN_RXD

PWM

SPI_SS

MOSI

MISO

NRES

HALL_C

HALL_B

HALL_A

9

10

11

12

13

14

15

16

PD6(AIN0/OC0A/PCINT22)

PD7(AIN1/PCINT23)

PB0(ICP1/CLKO/PCINT0)

PB1(OC1A/PCINT1)

PB2(OC1B/SS/PCINT2)

PB4(MISO/PCINT4)

PB3(MOSI/OC2A1/PCINT3)

VS

U1

ATA

6625

U2

ATA

6832

PD

3(IN

T1/

OC

2B/P

CIN

T19

)

GN

D

AG

ND

GN

D

GN

D

GN

D

GN

DP

GN

D

LIN

AG

ND

GN

D

MO

SI

ISP

MK

2 H

eade

r

MIS

O

JP1

NR

ES

SC

K

DIR

VC

C5V

VC

C5V

VC

C5V

VC

C5V

100

nF

C910

µF

50V

4.7

µF10

V

C5

C3

C11

100

kΩ

0ΩR3

10 k

ΩR

1

4.7

kΩR5

4.7

kΩR6

4.7

kΩR7

R8

100Ω

2

SW

ITC

H_C

CW

ON

/OF

F/O

N S

witc

hR

ight

Ang

le SW

ITC

H_C

W

SW

ITC

H_C

CW

8 7 6 5

NR

ES

LIN

_TX

D

LIN

_RX

D

13

Spe

ed S

et

SW

ITC

H_C

WP

D4(

T0/

XC

K/P

CIN

T20

)3

GN

D

VC

C5V

4V

CC

5G

ND

8P

B7(

TO

SC

2/X

TAL2

/PC

INT

7)

7P

B6(

TO

SC

1/X

TAL1

/PC

INT

6)

6

24 23

SC

K

Spe

ed S

et

22 21 20 171819V

CC

PC

1(A

DC

1/P

CIN

T9)

PC

0(A

DC

0/P

CIN

T8)

AD

C7

GN

D

AR

EF

PB

5(S

CK

/PC

INT

5)

AV

CC

AD

C6

PG

ND

VB

at

VB

at

30B

Q04

0D

1

GN

D

PG

ND

3 H

alf

Bri

dge

GN

D

GN

D

PG

ND

10 µ

F50

V

C6

100

nF50

V

100

nF50

V

220

pF

C1

100

nF

C7

100

nF

C12

1 nF

C4

PG

ND

GN

D

LIN

Tra

nsce

iver

VR

EG

0ΩR2

LIN

_EN

2LI

N_E

NLI

N

GN

D3

LIN

VC

C5

NR

ES

TX

D

RX

D4

LIN

OU

T1

OU

T1S

OU

T2

OU

T2S

OU

T3

OU

T3S

DI

PH

_A

PH

_B

PH

_C

15

2 1

Hal

lA

Hal

l_B

Hal

l_A

Hal

lC

Hal

lB2 12 12

B4

HA

LL

B2

116 12 13 1

4

CLK

5

MO

SI

SC

K

DO

7

CS

3

PW

MP

WM

6

18

12

12 1 53

2

GN

D

64

VC

C5V

VC

C5V

MO

T

VC

C5V

VB

atV

Bat

VC

C5V

100

nF

100

nF

C10

C8 AG

ND

GN

DA

GN

D

VC

C5V

PG

NDC

2

VC

C5V

R9

100Ω

R4

LED

CM

S G

reen

D2

330Ω

C13

1 nF

C14

1 nF

144987A–AUTO–03/07



Figure 7-2. BLDC Application Board Top View and Component Placement

154987A–AUTO–03/07

Figure 7-3. BLDC Application Board Bottom View

Table 7-1. BLDC Application Board Connectors

Connector Clamp Function Direction

LIN

1 Power Ground Input

2 LIN input Input

3 Power 12V Input

MOT1 Motor Phase A Output

2 Motor Phase B Output

B21 Motor Phase C Output

2 Power 5V Output

HALL1 Hall A Input

2 Hall B Input

B41 Hall C Input

2 Power GND Output

164987A–AUTO–03/07


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4987A–AUTO–03/07

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