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1. Overview of ARM9 Architecture
1.1 Introduction
The AT91RM9200 microcontroller offers a flexible configuration of on- and off-chipmemories together with an extensive set of peripherals for control, communicationand data storage purposes.
It is based on the ARM920T 200-MIPS advanced 32-bit RISC processor with 16K byteinstruction and 16K byte data cache memories. It features 16K bytes of on-chipSRAM and 128K bytes of ROM, together with an external bus interface withcontrollers for SDRAM and static memories including NAND Flash and CompactFlash.
Its extensive peripheral set includes USB Full Speed Host and Device Ports, 10/100
Base T Ethernet MAC, Multimedia Card Interface (MCI), three Synchronous SerialControllers (SSC), four USARTs, Master/Slave Serial Peripheral Interface (SPI), TimerCounters (TC) and Two Wire Interface (TWI). Four 32-bit Parallel I/O Controllersmultiplex the pins to/from these peripherals in order to reduce the device pin count,and peripheral DMA channels maximize the data throughput between theseinterfaces and the on- and off-chip memories.
The AT91RM9200 has a fully featured system controller for efficient systemmanagement, including two on-chip oscillators and PLLs, clock generator, advancedinterrupt controller (AIC), debug unit (DBGU), periodic interval timer, watchdog timerand real-time clock with alarm interrupt. It is supplied in a 208-pin PQFP or 266-ball
BGA package.
The AT91RM9200 is supported by the AT91RM9200-EK Evaluation Board andextensive third-party application development tools. It supports both Linux andWindows CE. It targets applications requiring enhanced performance such as hostprocessors for system control and connectivity. Examples include telematics systemsconnecting GPS receivers and GPRS communications, industrial automation, medicalsystems and point-of-sales terminals. It can also be used in conjunction with AtmelsFinger Chip fingerprint sensor for advanced biometrics-based security applications.
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1.2Features of ARM9 Core
Incorporates the ARM920T ARM Thumb Processor
1.
200 MIPS at 180 MHz, Memory Management Unit
2.
16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer
3. In-circuit Emulator including Debug Communication Channel
Low Power: 30.4 mA on VDDCORE, 3.1 mA in Standby Mode
Additional Embedded Memories
1.
16K Bytes of SRAM and 128K Bytes of ROM
External Bus Interface (EBI)
1. Supports SDRAM, Static Memory, Burst Flash, Glueless Connection to
CompactFlash, SmartMedia and NAND Flash
System Peripherals for Enhanced Performance:
1. Enhanced Clock Generator and Power Management Controller
2.
Two On-chip Oscillators with Two PLLs
3.
Very Slow Clock Operating Mode and Software Power Optimization
Capabilities
4. Four Programmable External Clock Signals
5. System Timer Including Periodic Interrupt, Watchdog and Second Counter
6.
Real-time Clock with Alarm Interrupt
7.
Debug Unit, Two-wire UART and Support for Debug Communication Channel8. Advanced Interrupt Controller with 8-level Priority, Individually MaskableVectored Interrupt Sources, Spurious Interrupt Protected Seven ExternalInterrupt Sources and One Fast Interrupt Source
9. Four 32-bit PIO Controllers with Up to 122 Programmable I/O Lines, InputChange Interrupt and Open-drain Capability on Each Line
10.
20-channel Peripheral Data Controller (DMA)
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Ethernet MAC 10/100 Base-T
1.
Media Independent Interface (MII) or Reduced Media Independent Interface
(RMII)
2. Integrated 28-byte FIFOs and Dedicated DMA Channels for Receive andTransmit
USB 2.0 Full Speed (12 Mbits per second) Host Double Port
1. Dual On-chip Transceivers (Single Port Only on 208-lead PQFP Package)
2. Integrated FIFOs and Dedicated DMA Channels
USB 2.0 Full Speed (12 Mbits per second) Device Port
1. On-chip Transceiver, 2-Kbyte Configurable Integrated FIFOs
Multimedia Card Interface (MCI)
1. Automatic Protocol Control and Fast Automatic Data Transfers
2. MMC and SD Memory Card-compliant, Supports Up to Two SD Memory Cards
Three Synchronous Serial Controllers (SSC)
1.
Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
2. I2S Analog Interface Support, Time Division Multiplex Support
3. High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
1. Support for ISO7816 T0/T1 Smart Card
2. Hardware and Software Handshaking
3.
RS485 Support, IrDA Up To 115 Kbps
4.
Full Modem Control Lines on USART1
Master/Slave Serial Peripheral Interface (SPI)
1. 8- to 16-bit Programmable Data Length, 4 External Peripheral Chip Selects
Two 3-channel, 16-bit Timer/Counters (TC)
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1. Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel
2.
Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
Two-wire Interface (TWI)
1.
Master Mode Support, All 2-wire Atmel EEPROMs Supported
IEEE 1149.1 JTAG Boundary Scan on All Digital Pins
Power Supplies
1. 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL
2. 1.65V to 3.6V for VDDIOP (Peripheral I/Os) and for VDDIOM (Memory I/Os)
Available in a 208-lead PQFP or 256-ball BGA Package
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1.3 CPU Block Diagram :
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1.4ARM9TDMI Processor Details:
1.4.1 Instruction Type
Instructions are either 32 bits (in ARM state) or 16 bits (in Thumb state).
1.4.2 Data Types
ARM9TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types.
Words must be aligned to four-byte boundaries and half-words to two-byte
boundaries.
Unaligned data access behavior depends on which instruction is used in a particular
location.
1.4.3 ARM9TDMI Operating Modes
The ARM9TDMI, based on ARM architecture v4T, supports seven processor modes:
User: Standard ARM program execution state
FIQ: Designed to support high-speed data transfer or channel processes
IRQ: Used for general-purpose interrupt handling
Supervisor: Protected mode for the operating system
Abort mode: Implements virtual memory and/or memory protection
System: A privileged user mode for the operating system
Undefined: Supports software emulation of hardware coprocessors
Mode changes may be made under software control, or may be brought about by
external interrupts or exception processing. Most application programs will execute in
User Mode. The non-user modes, known as privileged modes, are entered in order to
service interrupts or exceptions or to access protected resources.
1.4.4 ARM9TDMI Registers
The ARM9TDMI processor core consists of a 32-bit data path and associated control
logic. That data path contains 31 general-purpose registers, coupled to a full shifter,
Arithmetic Logic Unit and multiplier.
At any one time, 16 registers are visible to the user. The remainder is synonyms
used to speed up exception processing.
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Register 15 is the Program Counter (PC) and can be used in all instructions to
reference data relative to the current instruction.
R14 holds the return address after a subroutine call.
R13 is used (by software convention) as a stack pointer.
1.4.4.1 Registers used in Operating Modes:
Register R0 to R7 are unbanked registers, thus each of them refers to the same 32-
bit physical register in all processor modes. They are general purpose registers, with
no special uses managed by the architecture, and can be used wherever an
instruction allows a general purpose register to be specified.
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Registers R8 to R14 are banked registers. This means that each of them depends of
the current processor mode.
1.4.4.2 Modes and Exception Handling
All exceptions have banked registers for R14 and R13.
After an exception, R14 holds the return address for exception processing. This
address is used both to return after the exception is processed and to address the
instruction that caused the exception.
R13 is banked across exception modes to provide each exception handler with a
private stack pointer.
The fast interrupt mode also banks registers 8 to 12 so that interrupt processing can
begin without the need to save these registers.
A seventh processing mode, System Mode, does not have any banked registers. It
uses the User Mode registers. System Mode runs tasks that require a privileged
processor mode and allows them to invoke all classes of exceptions.
1.4.4.3 Status Registers
All other processor states are held in status registers. The current operating
processor status is in the Current Program Status Register (CPSR). The CPSR holds:
Four ALU flags (Negative, Zero, Carry, and Overflow),
Two interrupt disable bits (one for each type of interrupt),
One bit to indicate ARM or Thumb execution
Five bits to encode the current processor mode
All five exception modes also have a Saved Program Status Register (SPSR) which
holds the CPSR of the task immediately before the exception occurred.
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1.4.5 Exception Types
The ARM9TDMI supports five types of exceptions and a privileged processing mode
for each type. The types of exceptions are:
Fast interrupt (FIQ)
Normal interrupt (IRQ)
Memory aborts (used to implement memory protection or virtual memory)
Attempted execution of an undefined instruction
Software interrupt (SWIs)
Exceptions are generated by internal and external sources.
More than one exception can occur at the same time.
When an exception occurs, the banked version of R14 and the SPSR for the
exception mode are used to save the state.
To return after handling the exception, the SPSR is moved to the CPSR and R14 is
moved to the PC. This can be done in two ways:
Use of a data-processing instruction with the S-bit set, and the PC as the
destination
Use of the Load Multiple with Restore CPSR instruction (LDM)
1.4.6 ARM Instruction Set Overview
The ARM instruction set is divided into:
Branch instructions
Data processing instructions
Status register transfer instructions
Load and Store instructions
Coprocessor instructions
Exception-generating instructions
ARM instructions can be executed conditionally. Every instruction contains a 4-bit
condition code field (bits [31:28]).
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1.4.6.1 ARM Instructions List
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1.4.7 Thumb Instruction Set Overview
The Thumb instruction set is a re-encoded subset of the ARM instruction set.
The Thumb instruction set is divided into:
Branch instructions
Data processing instructions
Load and Store instructions
Load and Store multiple instructions
Exception-generating instruction
In Thumb mode, eight general-purpose registers are available, R0 to R7, that are the
same physical registers as R0 to R7 when executing ARM instructions. Some Thumb
instructions also access the Program Counter (ARM Register 15), the Link Register
(ARM Register 14) and the Stack Pointer (ARM Register 13). Further instructions
allow limited access to the ARM register 8 to 15.
1.4.7.1 Thumb Instruction List
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1.4.8 Memory Management Unit (MMU)
The ARM920T processor implements an enhanced ARM architecture v4 MMU to
provide translation and access permission checks for the instruction and data addressports of the ARM9TDMI core. The MMU is controlled from a single set of two-level
page tables stored in the main memory, providing a single address and translation
protection scheme. Independently, instruction and data TLBs in the MMU can be
locked and flushed.
1.4.8.1 Domain
A domain is a collection of sections and pages. The ARM920T supports 16 domains.
Access to the domains is controlled by the Domain Access Control register.
1.4.8.2 MMU Faults
The MMU generates alignment faults, translation faults, domain faults and
permission faults.
Alignment fault checking is not affected by whether the MMU is enabled or not.
The access controls of the MMU detect the conditions that produce these faults. If
the fault is a result of memory access, the MMU aborts the access and signals the
fault to the CPU core. The MMU stores the status and address fault in the FSR and
FAR registers (only for faults generated by data access).
The MMU does not store fault information about faults generated by an instruction
fetch.
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1.4.9 CPU Pin Details
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2. EPBARM9 Target System
2.1 Introduction to ARM9 Target System
The ARM9 board is intended for use in evaluation of the ARM9 core and peripherals
and developing prototypes using proven reference design platform. The standard kit
includes the development boards, serial cable, and distribution CD. The serial cable
allows simple program download and debug support from a standard serial terminal
which is independent of the host operation system. The distribution CD includes
sample source programs, and building cross-compiler tool chain and reference Linux
kernel.
2.2 The ARM9 Board Features
180 MHz, 200 MIPS ARM9 highly-integrated core (AT91RM9200) Independent 16KB instruction and 16KB data caches
32 MB SDRAM memory 8 MB parallel Flash memory SD/MMC card support
10/100 Ethernet USB 2.0 full speed host port USB 2.0 full speed device port RS-232 serial, dual transceiver, two DB9 connector 16KB boot EEPROM with boot loader 16KB internal SRAM
128KB internal ROM Many signals available on 20 pin connector Core clock up to 180 MHz On- chip RTC and DMA
JTAG connector
2.3 Memory Detail
Memory Type Size Start address End address
Internal SRAM 16kB 0x00200000 0x0021f400
Internal ROM 128kB 0x00100000 0x001fa000
External SDRAM 32MB 0x20000000 0x22000000ROM/Flash size 8MB 0x10000000 0x10400000
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2.4 Peripheral Detail
Type Reference Memory Location ID
Start EndUSB Device Port J4 0XFFFB0000 0XFFFB4000 11
USB Host Port J5 0XFFFB0000 0XFFFB4000 23
Ethernet J13 0XFFFBC000 0XFFFC0000 24
UART0 J3 0XFFFC0000 0XFFFC4000 06
DBGU J1 0XFFFFF200 0XFFFFF400 07
TWI U8 0XFFFB8000 0XFFFBC000 12
SPI J8 0XFFFE0000 0XFFFE4000 13
MCI J6 0XFFB4000 0XFFFB8000 10
SSC J7 0XFFFD0000 0XFFFD4000 14
PORT A J11 0XFFFFF400 0XFFFFF600 02
PORT B J12 0XFFFFF000 0XFFFFF800 03
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2.5 Board Layout
2.6 Detailed On-Board Peripheral Information
2.6.1 SDRAM
The 32 MB SDRAM is allocated at address 0x20000000. The devices are configured
during the auto-boot operation.
2.6.2 Parallel FLASH
The 8 MB parallel FLASH is allocated at address 0x10000000. The devices can be
erased and programmed using the U-boot utility.
2.6.3 USB full speed host port
This device is controlled by the internal register of the AT91Rm9200. The power
available for USB host port does not provide over current detection prevention as
specified in the USB spec. The supply is internally protected against over-current
conditions and can optionally be disabled via jumper.
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2.6.4 Power Supply
Type: SMPS
Ratings: 5 Volt and 1 Ampere
2.6.5 Jumper Setting:
Power Jumper: JMP4 and JMP5, connect this jumper which is near supply on
board.
Booting Selection Jumper: JMP1, selection of booting procedure
EEPROM selection jumper: JMP6, to connect EEPROM short this jumper
JTAG selection jumper: JMP1, to select JTAG connect this jumper.
Flash selection jumper: JP6, to select the External Flash connect this
Jumper.
2.7 Connector information
There are different connectors on the target system. The details for each connector
are shown below:
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2.7.1 GPIO Connector J11
PIN Signal Function
1 PA0 MISO/PCK32 PA1 MOSI/PCK0
3 PA2 SPCK/IRQ4
4 PA3 NPCS0/IRQ5
5 PA4 NPCS1/PCK1
6 PA5 NPCS2/TXD3
7 PA6 NPCS3/RXD3
8 PA17 TXD0/TIOA0
9 PA18 RXD0/TIOB0
10 PA19 SCK0/TIOA1
11 PA20 CTS0/TIOB1
12 PA21 RTS0/TIOA2
13 PA22 RXD2/TIOB2
14 PA23 TXD2/IRQ3
15 PA24 SCK2/PCK1
16 PA25 TWD/IRQ2
17 PA26 TWCK/IRQ1
18 3.3V
19 5.0 V
20 GND
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2.7.2 GPIO Connector J12
PIN SIGNAL FUNCTION
1 PB0 TF0/RTS32 PB1 TK0/CTS3
3 PB2 TD0/SCK3
4 PB3 RD0/MCDA1
5 PB4 RK0/MCDA2
6 PB5 RF0/MCDA3
7 PB6 TF1/TIOA3
8 PB7 TK1/TIOA3
9 PB8 TD1/TIOA4
10 PB9 RD1/TIOB4
11 PB10 RK1/TIOA5
12 PB11 RF1/TIOB5
13 PB20 TXD1
14 PB21 RXD1
15 PB22 SCK1
16 PB23 DCD1
17 PB24 CTS1
18 3.3V
19 5.0V
20 GND
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2.7.3 JTAG connector J10
PIN SIGNAL
1 3.3V2 3.3V
3 NTRST
4 GND
5 TDI
6 GND
7 TMS
8 GND
9 TCK
10 GND
11 GND
12 GND
13 TDO
14 GND
15 NRST
16 GND
17 NC
18 GND
19 NC
20 GND
2.7.4 MMC Connector J6
Pin signal function
1 Pa27 MCCK
2 Pa28 MCCDA
3 Pa29 MCDA0
4 Pb3 MCDA1
5 Pb4 MCDA26 Pb5 MCDA3
7 Vcc 3.3
8 Gnd Gnd
9 Vcc 3.3
10 Gnd Gnd
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2.7.5 SCC J7
Pin Signal function
1 Pb8 TDI2 Pb9 RDI
3 Pb10 TK
4 Pb11 RK1
5 Pb12 TF1
6
7
8
9
10
3. Unpacking the ARM9 Target Board
The Educational Practice Board for ARM9 (ARM920T) target is a self learning and
developing tool to learn the ARM9 core and Embedded Linux. The following is the list
of the items provided with the target:
ARM9 Target System
5V SMPS Power Supply Serial Cable Ethernet Cable DVD User Manual
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4.Viewing CD Contents
4.1 Introduction:
The distribution DVD contains all the necessary files required to work with the ARM9target systems. The following is the list of the contents:
Images
ARM-9 Tool Chain source code Setup Utilities Board manual
4.1.1 Folder Description
Images stage1.bin : binary image file to first time boot the board. u-boot.bin : It is image for U-boot.
rammonitor.bin ramtest.bin bootloader.bin : Image file for boot loader uImage/ linux-2.6.20.4 : Linux kernel image jffs2 : file system image with examples
ARM-9 tool chain buildroot.tar.bz
Source Code This folder contains the source code of different lab sessions (.c files)
Copy sourcecode\lab to /home directory of your LINUX host PC. Copy sourcecode\exercises to /home directory of your LINUX host PC. Copy sourcecode\IDEexample folder to your D:\ drive of your windows
PC.
Setup Utilities tftp32 utility winscp utility
putty utility ARM IDE setup
Board manual ARM9 board manual
Note:Here programs given in the CD content at sourcecode/exercises folder/directoryare the reference programs for the exercises given after each lab programs.
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5. ARM9 software setup
Installing the software used for ARM-9 board involves following steps
Installing the toolchain for ARM-9 Installing the winscp utility Installing the putty utility Installing the tftp32 utility
5.1 Installing the ARM9 tool chain
This session explains how to install toolchain for ARM-9 target board
Note that separate version of Linux are used by the target and the host LinuxPC.
The following Linux host operating system is supported for use with the
ARM9 target board.
o
Open SUSE 11.0
To install the ARM9 toolchain, follow this step:-
1.
Log in as root on your host Linux PC.2.Copy the build_root.tarfrom the Edutech DVD to the /optfolder.3.Now type the following command to Un-tar (Un-zip) the build_root.tar
4.[root@EDUTECH] tar vxf build_root.tar.
5.This command will take approx 5 min for execution.
6.
After executing this command you will see a folder build_root in the /optfolder.
7.As the folder is created, it means your toolchain has successfully installed.
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5.2 Installing the WinSCP utility
OBJECTIVE: HOW TO INSTALL WinSCP. PROCEDURE:
1. Copy the set up from the Edutech DVD/CD ,and paste it on your desktop.
2. Then click on WinSCP icon.
3.Then you will be able to see the above window.
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4. Now click on the Next button ,then you see the below window.
5. Again click on Next button ,you will see the below window.
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6. Now select the Norton Commander interface and click Next and you will see
below window.
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7. Now
Click the Install button.
8. Now select the Yes, restart the computer now and click on Finish button.
9. Now click on the Icon as soon below, from your desktop.
Winscp.lnk
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10. After clicking that Icon you will see the below window.
10
11. Enter the Host name:, User name: and Password: and click Login.
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12. After Login, you will see the below window. In this window on right hand side is
the Linux window/Host window, left hand side is the Window PC window/remote
window. Now you can copy your data from Host PC to Remote PC and Via-Versa.
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5. Enter the login name and password
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6.Now you can access the remote PC.
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5.4 Installation of tftp32 utility
The Tftp Protocol
TFTP (Trivial File Transfer Protocol) is a simple protocol used to transfer files to and
from a TFTP server (daemon).
TFTP is designed to be compact and easy to implement. Therefore, it lacks most of
the features of a regular FTP. The only thing it can do is read and write files from/to
a remote server. It cannot list directories, and currently has no provisions for user
authentication.
TFTPD32 is a TFTP server for Windows 95/98/Me and Windows NT/2000/XP.
Installation of tftp32:-
1.
Copy the TFTPUtility folder from DVD to your windows PC.
2.
Put that folder to C:\
3.
And also make shortcut of tftp32Utility on your desktop.
Shortcut to tftpd32.exe.lnk
4.
Double click on shortcut of tftp32 icon. You will below screen
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5. Click on browse option and select appropriate path from which you want totransfer the file to ARM9 target system.
6.
After selecting appropriate file click OK.7.
Now verify that you have selected correct files by clicking on showdirbutton. As shown below.
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5.5 Installation of Complete Setup of ARM IDE
5.5.1 Recommended PC configuration:-
1GHz 32 bit (x86) or 64 bit (x64) processor. 256 MB system memory. 20 GB hard drive with at least 1 GB of available space. CD ROM drive. 1 USB2.0 port. Windows ME/NT/2000/XP
5.5.2 Additional software requirement:-
If a window ME/NT/2000/XP is used, you must have to
download the windows installerin your PC. For installing ARM IDE you must check whether .NET Frame
Workis installed in your PC. If it is not installed, see theprocedure given below.
5.5.3 Installation of .NET Frame Work:-
Open the CD ROM.
Double click on the dotnetfx folder shown below.
Click on the Next.
click on Install.
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Click on finish. Now .NET Frame Work is installed in your PC.
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Select the path to store ARM IDE setup using Browse button shown belowthen click on Next.
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Click on Next.
Click on Close.
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6. Setting up hardware
6.1 Board Operation Steps:
First check whether the Power Supply is +5 v or not by multimeter
Now Disconnect JMP4 & JMP5
Connect power supply
Check voltage at the body of U2 = 3.3v, U3 = 1.8v by multimeter
Connect back jumper JMP 4 & JMP 5
Check jumper setting,JP6-> short, JMP1 -> short 2 pins towards connector
JMP6-> short, JMP2 -> open, JMP3 -> open
Check LED3 status whether LED3 blink or not.(if not blink Ethernet error)
Connect serial cable J1 to PC
Connect Ethernet J13 to PCs Ethernet connector
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Click on Linker Option.
In Run mode :- select ROM
In Out put :- select Bin.
In Optimization select level of optimization like s,1,2,3. s is the slanderedoptimization level.
Note: For ARM9 Target Board Select bin file as output file for program
execution.
Click on IDE Setting. Select the MAKE File path shown below.
C:\ProgramFiles\Edutech\ARM_IDE\WinARM\realease\ARM9\ Makefile
Select the Linker File path shown below.
C:\Program Files\Edutech\ARM_IDE\WinARM\realease\ARM9\ AT91RM9200-
ROM.ld
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Now Editor Window, Project Window, Output Window will open automatically.
About Editor Window:- In this window you are allow to write yourprogram.
About Project Window:- In this window you will find Source Files, LibraryFiles, Command Files, Linker File, Start Up File and RTOS(if any). As shownbelow you can add or remove any file by using right click on respected file.
About Output Window:- In this window you will find your output of projectafter compiling it. If any error or warning in your project then you can see itin this window.
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7.1.2 WRITING A FIRST PROGRAM using ARMIDE
For writing programs first do all the step of creating a project section. In Editor Window write a program.
Add required files from Project Window. Click on compile menu then click on Build or Re Build. See the Output Window. If you find Error None then go on next step
otherwise correct the error.
7.1.2.1 Program Execution on IDE:
To execute this program follow the steps
1. Connect the target board to the PC using serial cable. Use J1 connector
for serial connection.
2. Connect 5volt supply to J14 connector.
3. Set hyper terminal Parameter on windows PC in the following way
START ->ACCESSORIES->COMMUNICATION->HYPER TERMINAL.
Enter The Name :
Select COM PORT:
RESET Default
bits/sec:115200
Apply ok
It opens hyper terminal window
4. Power on the Target board.
5. Reset the board using RESET key PB1 of board , It will display
CCCCCCCCCC on window.
6. Depends on ASK board connect flat cable to J11 or J12 connector
accordingly
7. On hyper terminal window select TRANSFERoption
transfer -> send file->protocol->X modem->Browse File->CD-
>ARM9-> LAB.bin->send
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Program:
#i ncl ude
i nt mai n( voi d)
{
i nt i ;
f or ( i = 1; i
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8. Demo Example
8.1 Interfacing Basic Devices with ARM9 Target using IDE
8.1.1 SEVEN SEGMENT DISPLAY INTERFACING
Objective:
To study Seven Segment Display Interface with ARM9 target board:
Study of Seven Segment board Study of Seven Segment Display interface with AT91rm9200 Writing C program to interface Seven Segment Display
Part List:
Educational practice board for ARM 9 target board. Power supply Serial cable Flat cable PC
Edutech IDE Seven Segment Display Interface Board.
Procedure:
Write C program in editor window of ARMIDE, build it usingcompile option.
To execute this program follow the steps
1.
Connect the target board to the PC using serial cable. Use J1
connector for serial connection.
2. Connect 5volt supply to J14 connector.
3. Set hyper terminal Parameter on windows PC in the following
way:
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START ->ACCESSORIES->COMMUNICATION->HYPER TERMINAL
Enter The Name:
Select COM PORT:
RESET Default
Bits/sec: 115200
Apply ok
It opens hyper terminal window
Power on the Target board
Reset the board using RESET key PB1. Stop booting of board by pressing any key. It will display C on hyper terminal window. Connect the Seven Segment Display Interface Board to the
CPU target board as follows:
1) Connect J1 connector through flat cable to J12 connector of Target
board.
2) Connect J2 connector through flat cable to J11 connector of Target
board.
Transfer the binary file to the target as shown:
Transfer -> send file->protocol->X modem->Browse File->D:\IDEexamples\ex1-
>7seg. bin->send
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Program Folder:
Program Listing:
#i ncl ude"sevenseg. h"#i ncl ude
/ * i ncl ude t he par t i cul ar header f i l es */
voi d seg_i ni t ( ){
SEGMENTLI NES1=0XFFFFFF;SEGMENTLI NES2=0XFFFFFF;SEGMENTOUT1=0xFFFFFFFF;SEGMENTOUT2=0xFFFFFFFF;
}
voi d seg1ment 1(unsi gned i nt a){SEGMENTDATA1=0X007F;SEGMENTSELECT1=0x00100E00;SEGMENTDATA2=num[ a] ;SEGMENTSELECT2=SET( 20) ;}
voi d seg1ment 2(unsi gned i nt a){
SEGMENTDATA1=0X007F;SEGMENTSELECT1=0x00100E00;SEGMENTDATA2=num[ a] ;SEGMENTSELECT2=SET( 11) ;}
voi d seg1ment 3(unsi gned i nt a){SEGMENTDATA1=0X007F;SEGMENTSELECT1=0x00100E00;SEGMENTDATA2=num[ a] ;SEGMENTSELECT2=SET( 10) ;}
voi d seg1ment 4(unsi gned i nt a){SEGMENTDATA1=0X007F;SEGMENTSELECT1=0x00100E00;SEGMENTDATA2=num[ a] ;SEGMENTSELECT2=SET( 9) ;}
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voi d mai n( ){
seg_ i ni t ( ) ;whi l e( 1) {
seg1ment 4(1) ;del ay_ms( 900) ;seg1ment 3(2) ;del ay_ms( 900) ;seg1ment 2(3) ;del ay_ms( 900) ;seg1ment 1(4) ;del ay_ms( 900) ; }
}
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8.1.2 LCD INTERFACING
Objective:
To study LCD Interface with ARM9 target board:
Study of LCD board Study of LCD interface with AT91rm9200 Target Board Writing C program to interface LCD
Part List:
Educational practice board for ARM 9 target board. Power supply Serial cable
Flat cable PC Edutech IDE LCD Interface Board.
Procedure:
Write C program in editor window of ARMIDE, build it using compileoption.
To execute this program follow the steps as shown,
1. Connect the target board to the PC using serial cable. Use J1connector for serial connection.
2. Connect 5volt supply to J14 connector.
3. Set hyper terminal Parameter on windows PC in the following
way
START->ACCESSORIES->COMMUNICATION->HYPER
TERMINAL.
Enter The Name:
Select COM PORT:
RESET Default
Bits/sec: 115200
Apply o k
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It opens hyper terminal window
Power on the Target board
Reset the board using RESET key PB1.
Stop booting of board by pressing any key. It will display C on hyper terminal window.
LCD Interface Board connection to target board as follows: Connect J1 connector through flat cable to J11 connector of Target board.
Transfer binary file to Target Board. Transfer -> send file->protocol->X modem->Browse File->
D:\IDEexamples\ex2->LCD. bin->send
Program Description:
This Program will display EDUTECH on LCD
Pin Assignment:
J11 of target board connected to J1 of LCD board
J11 Connector of
Target Board
J1 Connector of
LCD/Keyboard
J2 Connector of
LCD/Keyboard
PA0 KB Column 0 N.C.
PA1 KB Column 1 N.C.
PA2 KB Column 2 N.C.
PA3 KB Column 3 N.C.
PA4 KB Column 4 N.C.
PA5 KB Row0 N.C.
PA6 KB Row 1 N.C.
PA17 KB Row 2 N.C.
PA18 N.C. N.C.
PA19 LCD Data Line D4 N.C.
PA20 LCD Data Line D5 N.C.
PA21 LCD Data Line D6 N.C.
PA22 LCD Data Line D7 N.C.PA23 LCD RS Line N.C.
PA24 LCD EN line N.C.
PA25 KB Row 3 N.C.
PA26 KB Row 4 N.C.
3.3V N.C N.C.
5.0 V VCC VCC
Ground Ground Ground
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Program Folder:
Program Listing:
#i ncl ude
#i ncl ude "l cd. h"
AT91PS_SYS LCD=( AT91PS_SYS) AT91C_BASE_SYS;
voi d Edut ech_Del ay( ) ;
/ **********************************************************************
Funct i on Name : voi d Lcddat ( voi d)
I nput : cms, r spi nOut put : I t Lat ches t he dat a on t he LCD pi ns
Descr i pt i on : Thi s f unct i on i s used t o l at ch t he dat a on t he LCD
Dat a l i nes.
**********************************************************************/
voi d Lcddat ( char cms, char r spi n)
{
l ong dat =cms;
dat = dat PI OA_CODR=~dat ;
/ / LCD_PI N = cms;
Edut ech_Del ay( ) ;
i f ( r spi n)
LCD- >PI OA_SODR=LCD_RS_PI N ;
el se
LCD- >PI OA_CODR=LCD_RS_PI N ;
/ / LCD_RS_PI N = r spi n;
Edut ech_Del ay( ) ;
LCD- >PI OA_SODR=LCD_EN_PI N ;
/ / LCD_EN_PI N = 1;
Edut ech_Del ay( ) ;
/ / LCD_EN_PI N = 0;LCD- >PI OA_CODR=LCD_EN_PI N ;
}
/ **********************************************************************
Funct i on Name : voi d LcdCommand( char l cdcommand)
I nput : l cdcommand
Out put : st andar d LCD command i s passed.
Descr i pt i on : Thi s f unct i on i s used t o pass commands.
**********************************************************************/
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voi d LcdCommand( char l cdcommand)
{
char dat ;
dat = ( l cdcommand>>4) ;
Lcddat ( dat , RS_LOW) ;
Lcddat ( l cdcommand, RS_LOW) ;
}
/ **********************************************************************
Funct i on Name : voi d LcdDat a( char l cdcommand)
I nput : l cddat a
Out put : Data i s passed.
Descr i pt i on : Thi s f unct i on i s used t o pass Dat a.
**********************************************************************/
voi d LcdDat a(char l cddata){
char dat ;
dat = ( l cddat a>>4) ;
Lcddat ( dat , RS_HI GH) ;
Lcddat ( l cddata, RS_HI GH) ;
}
/ **********************************************************************
Funct i on Name : voi d LcdI ni t ( voi d)
I nput : none
Out put : LCD get s i ni t i al i zed.
Descr i pt i on : Thi s f uncti on i s used I ni t i al i z i ng t he LCD.
**********************************************************************/
voi d LcdI ni t ( )
{
Edut ech_Del ay( ) ;
LcdCommand(0x03) ; / / set ent r y mode f or 4 bi t i nt er f ace
Edut ech_Del ay( ) ;
LcdCommand( 0x03) ;
Edut ech_Del ay( ) ;
LcdCommand( 0x03) ;
Edut ech_Del ay( ) ;LcdCommand( 0x02) ; / / cur sor home
Edut ech_Del ay( ) ;
LcdCommand( 0x02) ;
Edut ech_Del ay( ) ;
LcdCommand( 0x28) ;
Edut ech_Del ay( ) ;
LcdCommand(0x08) ; / / di spl ay of f
Edut ech_Del ay( ) ;
LcdCommand( 0x01) ;
Edut ech_Del ay( ) ;
LcdCommand(0x0C) ; / / di spl ay onEdut ech_Del ay( ) ;
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LcdCommand( 0x06) ; / / set ent r y mode
Edut ech_Del ay( ) ;
}
/ **********************************************************************
Funct i on Name : voi d LcdCl ear ( voi d)
I nput : none
Out put : LCD get s cl ear ed and at t he home posi t i on.
Descr i pt i on : Thi s f unct i on i s used t o cl ear t he LCD.
**********************************************************************/
voi d LcdCl ear ( )
{
LcdCommand( 0x01) ;
Edut ech_Del ay( ) ;
}
/ **********************************************************************
Funct i on Name : voi d LcdCur sorSet ( voi d)
I nput : Speci f i ed Row number and Col umn.
Out put : LCD cursor get s set at t he speci f i ed Row and
Col umn.
Descri pt i on : Thi s f uncti on i s used t o set cur sor at speci f i ed
pos i t i on.
**********************************************************************/
voi d LcdCur sorSet ( char r ow, char col umn)
{
char l cdcommand=0;
swi t ch( r ow)
{
case ROW1:
l cdcommand= ROWADDR1+col umn;
br eak;
case ROW2:
l cdcommand= ROWADDR2+col umn;
br eak;
case ROW3:
i f ( ROWADDR3==ROWADDR1){
l cdcommand= ROWADDR3+col umn;
}
el se
l cdcommand= ROWADDR3+col umn;
br eak;
case ROW4:
i f ( ROWADDR4==ROWADDR2)
{
l cdcommand= ROWADDR4+col umn;
}el se
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l cdcommand= ROWADDR4+col umn;
br eak;
}
LcdCommand( l cdcommand) ;
}
/ **********************************************************************
Funct i on Name : voi d LcdDi spl aySt r i ng( char *st r i ng, char r ow, char
col umn)
I nput : St r i ng , Speci f i ed Row and Col umn.
Out put : St r i ng i s di spl ayed at speci f i ed Row and Col umn
posi t i on
Descri pt i on : Thi s f uncti on i s used t o di spl ay st r i ng at
speci f i ed pos i t i on.
**********************************************************************/
voi d LcdDi spl aySt r i ng( char * st r i ng, char r ow, char col umn)
{
char i =0;
LcdCur sorSet ( r ow, col umn) ;
i =col umn;
whi l e( *s t r i ng ! = ' \ 0' && i
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8.1.3 RELAY INTERFACING
Objective:
To study Relay Interface with ARM9 target board:
Study of Relay board Study of Relay board interface with AT91rm9200 Target Board Writing C program to interface Relay
Part List:
Educational practice board for ARM 9 target board. Power supply Serial cable
Flat cable PC Edutech IDE
Relay Interface Board
Procedure:
Write C program in editor window of ARMIDE, build it using compile option.
To execute this program follow the steps
Connect the target board to the PC using serial cable. Use J1 connector forserial connection.
Connect 5volt supply to J14 connector.
Set hyper terminal Parameter on windows PC in the following way
START ->ACCESSORIES->COMMUNICATION->HYPER
TERMINAL.
Enter The Name:
Select COM PORT:
RESET Default
Bits/sec: 115200
Apply ok
It opens hyper terminal window
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Program Folder:
Program Listing:
#i ncl ude
AT91PS_SYS Rel ay=( AT91PS_SYS) AT91C_BASE_SYS;
/ / #i ncl ude "new. h"
/ / #def i ne set ( x) ( 1PI OA_CODR = 0xF00f f ; / / set ( 1) ; / / Set l ow on PA1
del ay_ms( 100000) ;
}
}
voi d del ay_ms( unsi gned l ong ms)
{
whi l e( ms)
{
- - ms;
}
}
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8.1.4 STEPPER MOTOR INTERFACING
Objective:
To study Stepper Motor Interface with ARM9 target board:
Study of Stepper Motor board Study of Stepper Motor interface with AT91rm9200 Target Board Writing C program to interface Stepper Motor
Part List:
Educational practice board for ARM 9 target board. Power supply Serial cable
Flat cable PC Edutech IDE
Stepper Motor Interface Board.
Procedure:
Write C program in editor window of ARMIDE, build it using compile option.
To execute this program follow the steps1. Connect the target board to the PC using serial cable. Use J1
connector for serial connection.
2. Connect 5volt supply to J14 connector.
3. Set hyper terminal Parameter on windows PC in the following
way START ->ACCESSORIES->COMMUNICATION->HYPER
TERMINAL.
Enter The Name:
Select COM PORT:
RESET Default
Bits/sec: 115200
Apply ok
It opens hyper terminal window
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voi d r ot at e_cl ockwi se( unsi gned i nt d, unsi gned i nt r ot at e)
{
i nt sm[ 4] = {0x01100000, 0x00500000, 0x00400400, 0x01000400};
i nt i ;
whi l e( r ot at e! =0){
f or( i =3; i >=0; i - - ){
SM- >PI OB_SODR= sm[ i ] ;Del ay_ms( d) ;
SM- >PI OB_CODR = sm[ i ] ;}
rota te - - ;
}}
Del ay_ms( i nt ms){
whi l e( ms){- - ms;}
}
voi d mai n( ){St epper _I ni t ( ) ;whi l e( 1)
{
r ot at e_cl ockwi se( 5000, 1000) ;r ot at e_ant i cl ockwi se( 5000, 1000) ;
}
}
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Program Folder:
Program Listing:
#i ncl ude
#i ncl ude
#i ncl ude "mat r i x. h"
#def i ne SET( X) ( 1PI OA_OER| =0XFFFFFFE0; / / ROW AS OUTPUT
PORTA_CLEAR| =0XFFFFFFE0; / / CLEAR ALL ROWS
}
/ ********************************************************************
Funct i on Name : Edutech_280X_KeyDet ect ( voi d)
I nput : None
Out put : val ue of t he detect ed key.
Descr i pt i on : Thi s f unct i on i s used t o det ect e key whi ch has
been pr essed.
********************************************************************/
char Edut ech_KeyDetect ( voi d){
unsi gned i nt dat a;PORTA_CLEAR| = ROWPI NS_PORTA;
r ow = Edutech_Fi ndRow( ) ;col = Edut ech_Fi ndCol ( ) ;dat a= col +( r ow*10) ;i f ( ( r ow >=0 && r ow =0 && col
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8.1.6 GRAPHIC LCD INTERFACING
Objective:
To study Graphic LCD Interface with ARM9 target board:
Study of Graphic LCD board Study of Graphic LCD interface with AT91rm9200 Target Board Writing C program to interface Graphic LCD
Part List:
Educational practice board for ARM 9 target board. Power supply Serial cable
Flat cable PC Edutech IDE
Graphic LCD Interface Board.
Procedure:
Write C program in editor window of ARMIDE, build it using compileoption.
To execute this program follow the steps1) Connect the target board to the PC using serial cable. Use J1
connector for serial connection.
2) Connect 5volt supply to J14 connector.
3)
Set hyper terminal Parameter on windows PC in the following
way START->ACCESSORIES->COMMUNICATION->HYPER
TERMINAL.
Enter The Name:
Select COM PORT:
RESET Default
Bits/sec: 115200
Apply o k
It opens hyper terminal window
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Power on the Target board Reset the board using RESET key PB1.
Stop booting of board by pressing any key.
It will display C on hyper terminal window. Graphic LCD Interface Board connection to target board as follows:
Connect J1 connector through flat cable to J11 connector of Target
board.
Transfer binary file to target board as shown below:Transfer -> send file->protocol->X modem->Browse File->
D:\IDEexamples\ex6->GLCD. bin->send
Program Description:
This Program will display alphabets abcde.
Pin Assignment:
GRAPHIC LCD J2 CONNECTOR TO J11 CONNECTOR OF TARGET BOARD
J11 Connector of Target
Board
J2 Connector of Graphic
LCD
PA0 Vss
PA1 Vdd
PA2 Vo
PA3 /RD
PA4 /WR
PA5 A0
PA6 DB0
PA17 DB1
PA18 DB2
PA19 DB3
PA20 DB4
PA21 DB5PA22 DB6
PA23 DB7
PA24 /CS
PA25 /RES
PA26 VEE
3.3V NC
5.0 V NC
GND Vss
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Program Folder:
Program Listing:
#i ncl ude
#i ncl ude "gl cd. h"
/ / #i ncl ude "edul ogo. i nc"
#def i ne SET( x) ( 1PI OA_SODR=GLCD_PI N;
/ / SystemSet
gl cd_cmd(0x40) ;
gl cd_dat ( 0x30) ;
gl cd_dat ( 0x87) ;
gl cd_dat ( 0x07) ;
gl cd_dat ( 0x27) ;gl cd_dat ( 0x2f ) ;
gl cd_dat ( 0xef ) ;
gl cd_dat ( 0x28) ;
gl cd_dat ( 0x00) ;
/ / Scr ol l
gl cd_cmd(0x44) ;
gl cd_dat ( 0x00) ;
gl cd_dat ( 0x00) ;
gl cd_dat ( 0xf 0) ;
gl cd_dat ( 0xb0) ;
gl cd_dat ( 0x04) ;
gl cd_dat ( 0xf 0) ;gl cd_dat ( 0x00) ;
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gl cd_dat ( 0x00) ;
gl cd_dat ( 0x00) ;
gl cd_dat ( 0x00) ;
gl cd_cmd(0x5d) ;
gl cd_dat ( 0x07) ;
gl cd_dat ( 0x07) ;
gl cd_cmd(0x4c) ;
gl cd_cmd(0x5a) ;
gl cd_dat ( 0x00) ;
gl cd_cmd(0x5b) ;
gl cd_dat ( 0x00) ;
gl cd_cmd(0x58) ;
gl cd_dat ( 0x16) ;
gl cd_cl r ( ) ;}
voi d out put _l ow( i nt dat a)
{
GLCD- >PI OA_CODR=dat a;
}
voi d gl cd_cmd( unsi gned l ong i nt cmd)
{
out put _hi gh( GLCD_A0) ; / / a0 hi gh
out put _hi gh( GLCD_A0) ; / / a0 hi gh
cmd=cmdPI OA_CODR=( ( ~cmd) &GLCD_DATAPI N) ;
out put _l ow( GLCD_CS) ; / / CS CLEAR
output _l ow( GLCD_WR) ;
del ay_ms( 200) ;
out put _hi gh( GLCD_WR) ;
out put _hi gh( GLCD_CS) ;
GLCD- >PI OA_SODR=GLCD_PI N;
del ay_ms( 200) ;
}
voi d gl cd_dat ( unsi gned l ong i nt dat )
{
out put_l ow( GLCD_A0) ;
out put _l ow( GLCD_A0) ;
dat =dat PI OA_CODR=( ( ~dat ) &GLCD_DATAPI N) ;
out put _l ow( GLCD_CS) ;
output _l ow( GLCD_WR) ;
del ay_ms( 200) ;
out put _hi gh( GLCD_WR) ;
out put _hi gh( GLCD_CS) ;
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f or ( a=0; a
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8.1.7 UART INTERFACING
Objective:
To study UART Interface with ARM9 target board:
Study of UART Interface with AT91rm9200 Target Board Writing C program to interface UART
Part List:
Educational practice board for ARM 9 target board. Power supply 2 Serial cable PC
Edutech IDE
Procedure:
write C program in editor window of ARMIDE, build it using compileoption.
To execute this program follow the steps
1. Connect the target board to the PC using serial cable. Use J1
connector for serial connection.
2. Connect 5volt supply to J14 connector.
3.
Set hyper terminal Parameter on windows PC in the following
way
START ->ACCESSORIES->COMMUNICATION->HYPER TERMINAL.
Enter The Name :
Select COM PORT:
RESET Default
bits/sec:115200
Apply o k
It opens hyper terminal window
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}
/ *asm( " . equ t est , 0x10F80000") ;
/ / char *pt r ;
/ / pt r =&t est ;DebugPr i nt f ( "shai l esh") ;
asm( "l dr r 0, =t est ") ;
/ / asm( "MOV r0, &pt r " ) ;
asm( "mov l r , pc") ;
asm( "BX r 0") ; */
/ *whi l e( i
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8.2 Interfacing Basic OS based linux programs with ARM9 Target with
linux
Lab 1
Objective:
To observe the booting process and practice basic commands using ARM9 target
board.
Steps:
1.
Connect the target board to the PC using the serial cable. Use the J1connector for the serial connection.
2.Connect the supplied Ethernet cable to the J13 connector on the target and
the PC3.Open the hyper terminal OR minicom and make the settings as mentioned:
Baud Rate = 115200, data bit 8, parity = none, stop bit = 14.Power on the target board5.
Observe on the screen the booting process. If you do not see the bootprocess, check the settings one again as mentioned above and apply reset tothe target.
6.
Login as 'root' on the terminal7.
Check the following commands using the following the steps:
[ r oot @EDUTECH]cd . .
[ r oot @EDUTECH] l s
[ r oot @EDUTECH] cd / home
[ r oot @EDUTECH/ home] l s
[ r oot @EDUTECH/ home] cd . .
[ r oot @EDUTECH/ ]
mailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECHmailto:root@EDUTECH8/10/2019 ARM9 20T lab manual
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Lab 2
Objective:
To write a simple program to display Hello World using ARM9 target board, build it,
and execute it using the target board.
Program:
#i ncl ude
i nt mai n( voi d)
{
i nt i ;
f or ( i = 1; i
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To modify:
Start the Lab2 sesssion in linux host PC.
$ cd / home/ l ab/ l ab2
Using the Editor modify the lab2.c program
$ vi l ab2. c
Build the program.
$ make
Copy it to the /root/tftpboot
$ cp l ab2 / r oot / t f t pboot
Copy lab2 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab2 192. 168. 0. 96
[ r oot @EDUTECH/ home] : chmod 777 l ab2
Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab2
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{
pr i nt f ( "PARENT: I am t he par ent process! \ n") ;
pr i nt f ( "PARENT: Her e' s my PI D: %d\ n", get pi d( ) ) ;
pr i nt f ( "PARENT: The val ue of my copy of chi l dpi d i s
%d\ n", chi l dpi d) ;
pr i nt f ( "PARENT: I wi l l now wai t f or my chi l d t o
exi t . \ n" ) ;
wai t ( &status); / * wai t f or chi l d t o exi t , and store i t s
status */
pr i nt f ( "PARENT: Chi l d' s exi t code i s: %d\ n",
WEXI TSTATUS( st atus) ) ;
pr i nt f ( "PARENT: Goodbye! \ n") ;
exi t ( 0) ; / * parent exi t s * /
}
}
el se / * f or k r et ur ns - 1 on f ai l ur e */{
per r or ( "f or k") ; / * di spl ay er r or message */
exi t ( 0) ;
}
}
Steps:
To execute:
to execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
now execute lab3 by this command
[ r oot @EDUTECH~] : . / l ab3
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To modify:
Start the Lab3 sesssion in linux host PC.
$ cd / home/ l ab/ l ab3
Using the Editor modify the lab3.c program
$ vi l ab3. c
Build the program.
$ make
Copy it to the /root/tftpboot
$ cp l ab3 / r oot / t f t pboot
Copy lab3 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab3 192. 168. 0. 96
[ r oot @EDUTECH/ home] : chmod 777 l ab3
Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab3
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Lab 4
Objective:
To write a simple program to create clone of process, build it, and execute it using
the target board.
Program:
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude #def i ne GOT1 ( 1
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per r or ( "Cl one 3 f ai l ed") ;
exi t ( - 3) ;
}
sl eep( 1) ;
pr i nt f ( "Par ent : wai t i ng f or t he cl ones to di e. \ n") ;
nost atus = st atus = 0;
whi l e ( 1) {
i f ( ( wpi d = wai t pi d(cl one1, &r esul t , WNOHANG| __WCLONE))
== - 1)
nost atus | = GOT1;
i f ( wpi d == cl one1) {
st at us | = GOT1;
pr i nt f ( "Cl one1 gave back %i \ n",
WEXI TSTATUS( r esul t ) ) ;
}
i f ( ( wpi d = wai t pi d(cl one2, &r esul t , WNOHANG| __WCLONE))
== - 1)
nost atus | = GOT2;
i f ( wpi d == cl one2) {
st at us | = GOT2;
pr i nt f ( "Cl one2 gave back %i \ n",
WEXI TSTATUS( r esul t ) ) ;
}
i f ( ( wpi d = wai t pi d(cl one3, &r esul t , WNOHANG| __WCLONE))
== - 1)
nost atus | = GOT3;
i f ( wpi d == cl one3) {
st at us | = GOT3;
pr i nt f ( "Cl one3 gave back %i \ n",
WEXI TSTATUS( r esul t ) ) ;
}
i f ( st at us == ALLGOT | | nost at us == ALLGOT)
br eak;
}
i f ( st at us == ALLGOT) {
pr i nt f ( "Cl ones exi t ed. \ nGoodbye. \ n") ;
r et urn EXI T_SUCCESS;
} el se {per r or ( "Wai t i ng f or cl ones f ai l ed") ;
r etur n EXI T_FAI LURE;
}
}
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Lab 5
Objective:
To write a simple program to create thread, build it, and execute it using the target
board.
Program:
#i ncl ude
#i ncl ude
#i ncl ude
#def i ne NUM_THREADS 5
/ * t hi s pr ogr am creat e the thr ead*/
voi d *Pr i nt Hel l o( voi d * t hr eadi d){
i nt t i d;
t i d = ( i nt ) t hr eadi d;
pr i nt f ( "Hel l o Wor l d! I t ' s me, t hr ead #%d! \ n", t i d) ;
pt hr ead_exi t ( NULL) ;
}
i nt mai n( i nt ar gc, char *ar gv[ ] )
{
pt hr ead_t t hr eads[ NUM_THREADS] ; / / def i ne t he t hr ead var i abl e
i nt r c, i ;
f or ( i =0; i
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Steps:
To execute:
to execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
now execute lab5 by this command
[ r oot @EDUTECH~] : . / l ab5
To modify:
1. Start the Lab5 sesssion in linux host PC.
$ cd / home/ l ab/ l ab5
2. Using the Editor modify the lab5.c program
$ vi l ab5. c
3. Build the program.
$ make
4. Copy it to the /root/tftpboot
$ cp l ab5 / r oot / t f t pboot
5. Copy lab5 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab5 192. 168. 0. 96[ r oot @EDUTECH/ home] : chmod 777 l ab5
6. Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab5
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r es = st r _accumul at e( "Resul t of ") ;
r es = st r _accumul at e( ( char *) ar g) ;
r es = st r _accumul at e( " t hr ead") ;
pr i nt f ( "Thr ead %l x: \ "%s\ "\ n", pt hr ead_sel f ( ) , r es);
r et ur n NULL;
}
i nt mai n( i nt ar gc, char ** ar gv)
{
char * r es;
pt hr ead_t t h1, t h2;
r es = st r _accumul at e( "Resul t of ") ;
pt hr ead_creat e( &t h1, NULL, pr ocess, ( voi d *) "f i r st ") ;
pt hr ead_cr eat e( &t h2, NULL, pr ocess, ( voi d *) "second") ; r es =
str _accumul at e( "i ni t i al t hr ead") ;
pr i nt f ( "Thr ead %l x: \ "%s\ "\ n", pt hr ead_sel f ( ) , r es);pt hr ead_j oi n( t h1, NULL);
pt hr ead_j oi n( t h2, NULL);
exi t ( 0) ;
}
Steps:
To execute:
to execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
now execute lab6 by this command
[ r oot @EDUTECH~] : . / l ab6
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}pt hr ead_mut ex_unl ock( &condi t i on_mutex ) ;pt hr ead_mut ex_l ock( &count _mutex ) ;count ++;
pr i nt f ( "Count er val ue f unct i onCount 2: %d\ n", count ) ;pthread_mutex_unl ock( &count_mutex ) ;
i f ( count >= COUNT_DONE) r et urn( NULL) ;
}
}
Steps:
To execute:
To execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
Now execute lab7 by this command
[ r oot @EDUTECH~] : . / l ab7
To modify:
Start the Lab7 sesssion in linux host PC.
$ cd / home/ l ab/ l ab7
Using the Editor modify the lab7.c program
$ vi l ab7. c
Build the program.
$ make
Copy it to the /root/tftpboot
$ cp l ab7 / r oot / t f t pboot
Copy lab7 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab7 192. 168. 0. 96[ r oot @EDUTECH/ home] : chmod 777 l ab7
Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab7
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Steps:
To execute:
To execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
Now execute lab8 by this command
[ r oot @EDUTECH~] : . / l ab8
To modify:
Start the Lab8 sesssion in linux host PC.
$ cd / home/ l ab/ l ab8
Using the Editor modify the lab8.c program
$ vi l ab8. c
Build the program.
$ make
Copy it to the /root/tftpboot
$ cp l ab8 / r oot / t f t pboot
Copy lab8 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab8 192. 168. 0. 96[ r oot @EDUTECH/ home] : chmod 777 l ab8
Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab8
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Steps:
To execute:
To execute program from ARM9 target board go to /home/Example directoryby this command
[ r oot @EDUTECH~] : cd / home/ exampl e
Now execute lab9 by this command
[ r oot @EDUTECH~] : . / l ab9
To modify:
Start the Lab9 sesssion in linux host PC.
$ cd / home/ l ab/ l ab9
Using the Editor modify the lab9.c program
$ vi l ab9. c
Build the program.
$ make
Copy it to the /root/tftpboot
$ cp l ab9 / r oot / t f t pboot
Copy lab9 to target board.
[ r oot @EDUTECH/ home] : t f t p - g - r l ab9 192. 168. 0. 96[ r oot @EDUTECH/ home] : chmod 777 l ab9
Execute the program from target board
[ r oot @EDUTECH/ home] : . / l ab9
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Lab 10
Objective:
To write a simple program of Interporcess communication between two process
using signal build it, and execute it using the target board.
Program:
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude #i ncl ude
voi d si ghup( ) ; / * rout i nes chi l d wi l l cal l upon si gt r ap */
voi d si gi nt ( ) ;
voi d s i gqui t ( ) ;
i nt mai n( )
{
i nt pi d;
/ * get chi l d pr ocess */
i f ( ( pi d = f or k( ) ) < 0)
{
perr or( " f ork" ) ;
exi t ( 1) ;
}
i f ( pi d == 0)
{ / * chi l d * /
si gnal ( SI GHUP, si ghup) ; / * set f uncti on cal l s */
s i gnal ( SI GI NT, s i gi nt ) ;
s i gnal ( SI GQUI T, s i gqui t ) ;
f or ( ; ; ) ; / * l oop f or ever * /
}
el se / * par ent */
{ / * pi d hol d i d of chi l d */pr i nt f ( " \ nPARENT: sendi ng SI GHUP\ n\ n" ) ;
ki l l ( pi d, SI GHUP) ;
sl eep( 3) ; / * pause f or 3 secs */
pr i nt f ( "\ nPARENT: sendi ng SI GI NT\ n\ n") ;
ki l l ( pi d, SI GI NT) ;
sl eep( 3) ; / * pause f or 3 secs */
pr i nt f ( "\ nPARENT: sendi ng SI GQUI T\ n\ n" ) ;
ki l l (pi d, SI GQUI T) ;
s l eep( 3) ;
}
r et urn( 0) ;
}
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Lab 11
Objective:
To write a simple program of Interporcess communication between two process
using semaphore build it, and execute it using the target board.
Program:
#i ncl ude
#i ncl ude
#i ncl ude
#i ncl ude
uni on semun {
i nt val ;
st r uct semi d_ds *buf ;ushor t *ar r ay;
}
mai n( )
{ i nt i , j ;
i nt pi d;
i nt semi d; / * semi d of semaphore set */
key_t key = 1234; / * key to pass t o semget ( ) */
i nt semf l g = I PC_CREAT | 0666; / * semf l g to pass t o semget ( ) */
i nt nsems = 1; / * nsems t o pass t o semget ( ) */
i nt nsops; / * number of oper at i ons t o do */
st r uct sembuf *sops = ( st r uct sembuf *) mal l oc( 2*si zeof ( st r uct
sembuf ) ) ;
/ * pt r t o oper at i ons to per f or m */
/ * set up semaphor e */
i f ( ( semi d = semget ( key, nsems, semf l g) ) == - 1) {
per r or ( "semget : semget f ai l ed") ;
exi t ( 1) ;} el se
( voi d) f pr i nt f ( st der r , "semget : semget succeeded: semi d =\
%d\ n" , semi d) ;
/ * get chi l d pr ocess */
i f ( ( pi d = f or k( ) ) < 0) {perr or( " f ork" ) ;
exi t ( 1) ;
}
i f ( pi d == 0)
{ / * chi l d * /
i = 0;
whi l e ( i < 1) {/ * al l ow f or 3 semaphor e set s */
nsops = 2;
/ * wai t f or semaphore t o reach zero */
sops[ 0] . sem_num = 0; / * We onl y use one t r ack */
sops[ 0] . sem_op = 0; / * wai t f or semaphor e f l ag t o become zero
*/
sops[ 0] . sem_f l g = SEM_UNDO; / * t ake of f semaphor e asynchronous
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*/
sops[ 1] . sem_num = 0;
sops[ 1] . sem_op = 1; / * i ncr ement semaphore - - t ake cont r ol of
t rack */
sops[ 1] . sem_f l g = SEM_UNDO | I PC_NOWAI T; / * t ake of f semaphore
*/
/ * Recap t he c