Analog Integrated Circuits Fundamental Building Blocks

Analog Integrated CircuitsFundamental Building Blocks

Faculty of Electronics Telecommunications and Information Technology

Fundamental Building BlocksCurrent mirrors

Information Technology

Gabor CsipkesBases of Electronics Department

Outline

current source biasing – voltage sources

MOS transistor current mirrors

fundamental current mirror fundamental current mirror cascode current mirror low swing cascode current mirror unbalanced and symmetrical Wilson current mirrors

bipolar transistor current mirrors

fundamental current mirror fundamental current mirror with β compensation fundamental current mirror with resistive emitter degeneration

Analog Integrated Circuits – Fundamental building blocks – Current mirrors 2

fundamental current mirror with resistive emitter degeneration cascode current mirror unbalanced and symmetrical Wilson current mirrors

Current mirrors – principles of operation

integrated current sources with transistors need bias voltages → voltage sources

1

mginR outR

Is this a voltage source?

key parameters to consider:

input resistance → must be as small as possible → current input

Current mirror

1: n


input resistance → must be as small as possible → current input

output resistance → must be as large as possible → current output

minimum required output voltage required input voltage current gain → precision imposed by the application

The fundamental MOS current mirror

Small signal modelNMOS PMOS

2out

out DSout

VR rI

1

1inin

in m

VRI g

min 2o DSatV V1in DSat ThV V V

current gain: 2 2 21GS Th DSout V V VIn

1 outVn


current gain:

2 2 2

1 1 11GS Th DSout

in GS Th DS

InI V V V

212

Th

DSat

VnV

Δβ – geometry mismatch

ΔVTh – threshold voltage mismatch

1out

in

nV

The MOS cascode current mirrorNMOS PMOS

1 1min 4 2 2o DSat DSat ThV V V V

3 3 1 1in DSat Th DSat ThV V V V V

3BSf V

(!)

2 4 4 4 2 4out DS DS m mb DS DSR r r g g r r

1 3

1 1in

m m

Rg g


Small signal model

The MOS cascode current mirror

the VGS voltages of M3 and M4 balance the fundamental mirror M1-M2 → n is accurately defined

1 2in out DS DSV V V V

1DSV 2DSV

1 2in out DS DS


The current gain is very close to unity even when the input-output voltage imbalance ΔV is significant

The MOS low swing cascode current mirror the cascode current mirror is not optimal in terms of Vomin → the gate voltage of M4must be decreased by VTh

4GV1 2

min 2o DSatV V

1 2DS DSV V

3 4

4GV


1 2DS DS RV V V R

triode region

The MOS low swing cascode current mirror

NMOS PMOS

1R

min 4 2o DSat DSatV V V

1 1in DSat ThV V V

2 4 4 4 2 4out DS DS m mb DS DSR r r g g r r

1in

m

Rg


Small signal model

The Wilson current mirror

NMOS PMOS

2 3m mg gR

min 3 2 2o DSat DSat ThV V V V


1 3 1 3

2

m m DS DSout

m

g g r rRg

2 3

1 3

m min

m m

g gRg g

Small signal model Vin and Vout create voltage imbalance

between V and V


modelbetween VDS1 and VDS2

Accuracy issues for the current gain n

The balanced Wilson current mirror

NMOS PMOS

2 3m mg gR

min 3 2 2o DSat DSat ThV V V V


1 3 1 3

2

m m DS DSout

m

g g r rRg

2 3

1 3

m min

m m

g gRg g


Small signal model

The fundamental bipolar current mirrorNPN PNP

1

1in

m

Rg

min 2o CEV V1in BEV V

2 2 11S CE CEI V V

2out CER r

2 1SI Vn


current gain:

2 2 1

1 1

2 2 1

1 1

1

11 1

S CE CE

S CE EA

S CE CE

S CE EA

I V VI V V

nI V VI V V

2

1 2S

S

InI

ΔV – input-output voltage imbalance

2

1

1S

S in EA

I VnI V V

The fundamental current mirror with β compensation

NPN PNP

1

1in

m

Rg

min 2o CEV V1 3in BE BEV V V

current gain → β replaced by β (β+1) → n much closer to the ideal value when the

2out CER r


current gain → β replaced by β (β+1) → n much closer to the ideal value when the input and the output are balanced in voltage

2

1

11 2

S

S

InI

2

1

1S

S in EA

I VnI V V

The degenerated fundamental current mirror

NPN PNP

11

1in

m

R Rg

min 2 2o CE outV V I R 1 1in BE inV V I R

current gain:

2 2 2 2 2out CE m CER r R g r R

1RnR

1 1 2 2BE in BE outV I R V I R


current gain:2R

remember to adjust the emitter areas of Q1 and Q2proportionally with the current in each branch !!!

n is still affected by the finite β and by ΔV

22 1

1 1 2

S

S

IA R nA I R

1 1 2 2BE in BE outV I R V I R

The bipolar cascode current mirrorNPN PNP

1 3

1 1in

m m

Rg g

min 4 2o CE BEV V V 1 3in BE BEV V V

4 4 2 4

24 2

1

1

m CE CE BEout

mBE CE

m

g r r rRgr rg


current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4

22

21 4 2

S

S

InI

The bipolar Wilson current mirror

asymmetrical

3 2 3BE m min

r g gR

g g g r

min 4 2o CE BEV V V 1 3in BE BEV V V current gain → β influences the accuracy while the fundamental mirror Q1-Q2 is balanced by the cascode transistors Q3-Q4

balanced


2 1 3 3in

m m m BE

Rg g g r

11 3 1 3

3

1 12 1

3 3

1

CEm m CE CE

BEout

CE CEm m

BE BE

rg g r rrR

r rg gr r

22

21

24 2

S

S

InI

Bibliography

P.E. Allen, D.R. Holberg, CMOS Analog Circuit Design, Oxford University Press, 2002

B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2002

D. Johns, K. Martin, Analog Integrated Circuit Design, Wiley, 1996

P.R.Gray, P.J.Hurst, S.H.Lewis, R.G, Meyer, Analysis and Design of Analog Integrated Circuits, Wiley,2009

R.J. Baker, CMOS Circuit Design, Layout and Simulation, 3rd edition, IEEE Press, 2010


Analog Integrated Circuits Fundamental Building Blocks

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