ACOE343 - Real-Time Embedded Processor Systems Dr. Konstantinos Tatas Office 107, FRC building .

ACOE343 - Real-Time Embedded Processor Systems

Dr. Konstantinos Tatas

Office 107, FRC building

http://staff.fit.ac.cy/com.tk

Course outline (1/5)

• Programme of Studies:BSc in Computer Engineering, BSc in Computer Science

• Name of the module:ACOE343 - Real-Time Embedded Processor Systems

• Target group: Computer Engineering – Computer Science students

• Level of the unit:BSc –6th Semester• Entrance requirements: ACOE201• Number of ECTS credits: 6

Course outline (1/5)• Competences to be developed:

– Produce efficient real-time designs using the latest technology of PIC and 8051-based microcontrollers and the state-of-art Texas Instruments TMS320C64x DSP processors.

– Demonstrate real-time algorithmic design techniques for embedded applications using assembly and C/C++ programming, implementation, hardware debugging and measurement techniques using the available uP and DSP boards.

Course outline (1/5)Course Description:• Embedded C/C++ and Assembly Languages: Embedded C and

assembly for programming the 8051-based microcontrollers. Coverage of C/C++ for programming DSPs. Real-Time Design Techniques.

• 8051-Based Microcontrollers: The MSC121x Development System, Real-Time Input and Output Applications, Architecture and ISA of the MSC121x microcontroller, Real-Time Embedded Ethernet Applications and Real-Time Data Acquisition Applications.

• DSPs: The DSP Development System, Real-Time Input and Output Applications with the DSK, Architecture and ISA of the C64x Processor, Fixed-Point Considerations.

• DSP Techniques: FIR and IIR filter Applications. FFT, digital modulation techniques and Applications.

• Laboratory Work: Individual or small group experiments based on using a variety of EDA tools for programming, debugging and testing the microcontroller and DSP boards.

Course outline (1/5)• Textbooks:

– M. Pont, Embedded C, Addison Wesley, 2002. – N. Kehtarnavaz, Real-Time Digital Signal Processing Based on the

TMS320C6000, Newnes, 2004.– K. Arnold, Embedded Controller Hardware Design, Newnes, 2001.

• References:– M. Margolis, Arduino Cookbook, O’Reilly– T. Noergaard, Embedded Systems Architecture: A Comprehensive

Guide for Engineers and Programmers, Newnes, 2005.– B. DeMuth, Designing Embedded Internet Devices, Newnes, 2002.– L. Edwards, Embedded System Design on a Shoestring, Newnes,

2003.• Course webpage:

– http://staff.fit.ac.cy/com.tk/ACOE343.html

Course outline (1/5)

• Assessment:– Mid-term Exams: 40%– Laboratory Work: 40%– Assignment/Group project: 15%– Quizzes: 5%

Mid-term exams (40%)

• Microcontrollers:– Multiple choice questions– Small programs

• Assembly/C/either

• DSPs:– Multiple choice questions– Small programs

• Mostly C

Laboratory work (40%)• Small group experiments with the ChipKit MAX32 PIC-

based Arduino• Small group experiments with EdSim 8051 emulator• Small group experiments with the TI DSK• Deliverables:

– Lab report (with source code)!!!

• Assessment:– Active participation:40%– Methodology/Source code:30%– Board Testing: 20%– Presentation:10%

• Labs should be submitted within one week after lab conduct time and grades will be posted on the e-learning website within another week

Assignment/Group Project (15%)

• 8051 emulator or Chipkit MAX32 application implementation

• Done in small groups

• Different application for each group

Microprocessors for Embedded systems

• Computing systems are everywhere• Most of us think of “desktop” computers

– PC’s– Laptops– Mainframes– Servers

• But there’s another type of computing system– Far more common...

Embedded systems overview

• Embedded computing systems– Computing systems embedded

within electronic devices– Hard to define. Nearly any

computing system other than a desktop computer

– Billions of units produced yearly, versus millions of desktop units

– Perhaps 50 per household and per automobile

Computers are in here...

and here...

and even here...

Lots more of these, though they cost a lot

less each.

A “short list” of embedded systems

And the list goes on and on

Anti-lock brakesAuto-focus camerasAutomatic teller machinesAutomatic toll systemsAutomatic transmissionAvionic systemsBattery chargersCamcordersCell phonesCell-phone base stationsCordless phonesCruise controlCurbside check-in systemsDigital camerasDisk drivesElectronic card readersElectronic instrumentsElectronic toys/gamesFactory controlFax machinesFingerprint identifiersHome security systemsLife-support systemsMedical testing systems

ModemsMPEG decodersNetwork cardsNetwork switches/routersOn-board navigationPagersPhotocopiersPoint-of-sale systemsPortable video gamesPrintersSatellite phonesScannersSmart ovens/dishwashersSpeech recognizersStereo systemsTeleconferencing systemsTelevisionsTemperature controllersTheft tracking systemsTV set-top boxesVCR’s, DVD playersVideo game consolesVideo phonesWashers and dryers

Some common characteristics of embedded systems

• Single-functioned– Executes a single program, repeatedly

• Tightly-constrained– Low cost, low power, small, fast, etc.

• Reactive and real-time– Continually reacts to changes in the system’s

environment– Must compute certain results in real-time

without delay

An embedded system example – Digital camera

• Single-functioned -- always a digital camera• Tightly-constrained -- Low cost, low power, small, fast• Reactive and real-time -- only to a small extent

Microcontroller

CCD preprocessor Pixel coprocessorA2D

D2A

JPEG codec

DMA controller

Memory controller ISA bus interface UART LCD ctrl

Display ctrl

Multiplier/Accum

Digital camera chip

lens

CCD

Embedded Software Development Requires as Much/More Design Effort Than Hardware

A System-on-a-Chip: Example

Courtesy: Philips

Design at a crossroad

System-on-a-Chip

RAM

500 k Gates FPGA+ 1 Gbit DRAMPreprocessing

Multi-

SpectralImager

Csystem+2 GbitDRAMRecog-nition

Ana

log

64 SIMD ProcessorArray + SRAM

Image Conditioning100 GOPS

• Embedded applications where cost, performance, and energy are the real issues!

• DSP and control intensive• Mixed-mode• Combines programmable and

application-specific modules• Software plays crucial role

Design challenge – optimizing design metrics

• Obvious design goal:– Construct an implementation with desired

functionality

• Key design challenge:– Simultaneously optimize numerous design

metrics

• Design metric– A measurable feature of a system’s

implementation– Optimizing design metrics is a key challenge

Design challenge – optimizing design metrics

• Common metrics– Unit cost: the monetary cost of manufacturing each copy of the

system, excluding NRE cost

– NRE cost (Non-Recurring Engineering cost): The one-time monetary cost of designing the system

– Size: the physical space required by the system

– Performance: the execution time or throughput of the system

– Power: the amount of power consumed by the system

– Flexibility: the ability to change the functionality of the system without incurring heavy NRE cost

Design challenge – optimizing design metrics

• Common metrics (continued)– Time-to-prototype: the time needed to build a

working version of the system

– Time-to-market: the time required to develop a system to the point that it can be released and sold to customers

– Maintainability: the ability to modify the system after its initial release

– Correctness, safety, many more

Design metric competition -- improving one may worsen others

• Expertise with both software and hardware is needed to optimize design metrics– Not just a hardware or

software expert, as is common

– A designer must be comfortable with various technologies in order to choose the best for a given application and constraints

SizePerformance

Power

NRE cost

Microcontroller

CCD preprocessor Pixel coprocessorA2D

D2A

JPEG codec

DMA controller

Memory controller ISA bus interface UART LCD ctrl

Display ctrl

Multiplier/Accum

Digital camera chip

lens

CCD

Time-to-market: a demanding design metric

• Time required to develop a product to the point it can be sold to customers

• Market window– Period during which the

product would have highest sales

• Average time-to-market constraint is about 8 months

• Delays can be costly

Revenues ($)

Time (months)

Losses due to delayed market entry

• Simplified revenue model– Product life = 2W, peak at W– Time of market entry defines

a triangle, representing market penetration

– Triangle area equals revenue

• Loss – The difference between the

on-time and delayed triangle areas

On-time Delayed

entry entry

Peak revenue

Peak revenue from delayed

entry

Market

riseMarket

fall

W 2WTime

D

On-time

Delayed

Reven

ues (

$)

Losses due to delayed market entry (cont.)

• Area = 1/2 * base * height– On-time = 1/2 * 2W * W– Delayed = 1/2 * (W-D+W)*(W-

D)• Percentage revenue loss = (D(3W-

D)/2W2)*100%• Try some examples

– Lifetime 2W=52 wks, delay D=4 wks

– (4*(3*26 –4)/2*26^2) = 22%– Lifetime 2W=52 wks, delay D=10

wks– (10*(3*26 –10)/2*26^2) = 50%– Delays are costly!

On-time Delayed

entry entry

Peak revenue

Peak revenue from delayed

entry

Market

riseMarket

fall

W 2WTime

D

On-time

Delayed

Reven

ues (

$)

Real-time (reactive) systems

• Systems that are bound by a real-time constraint (“deadline”) in their operation

• If the deadline is not met it is usually considered a system failure, even if the output is eventually correct

• Deadlines are usually relative to an event• Hard deadlines: Anti-lock brakes, • Soft deadlines: Digital video• Not the same as high-performance systems,

because often running faster than real-time requirement is not necessary or desired

Real-time constraints

• te + to < tc

• te: execution time

• to: overhead time

• tc: constraint time

Example

• Assuming a real-time system that processes samples at a f= 10 MHz sampling rate, and a to= 20 ns, select the most appropriate implementation among the following:– A processor running at 500 MHz, requiring 100 cycles

at a cost of 50$– An FPGA running at 200 MHz, requiring 10 cycles at

a cost of 60$– A DSP running at 500 MHz, requiring 20 cycles at a

cost of 100$– An ASIC running at 2 GHz, requiring 20 cycles at a

cost of 500$