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4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz Data Sheet HMC1121 Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com FEATURES High saturated output power (PSAT): 36.5 dBm at 30% power added efficiency (PAE) High output third-order intercept (IP3): 44 dBm typical High gain: 28 dB typical High output power for 1 dB compression (P1dB): 36 dBm typical Total supply current: 2200 mA at 7 V 40-lead, 6 mm × 6 mm LFCSP package: 36 mm 2 APPLICATIONS Point to point radios Point to multipoint radios Very small aperture terminals (VSATs) and satellite communications (SATCOMs) Military electronic warfare (EW) and electronic counter measures (ECM) FUNCTIONAL BLOCK DIAGRAM PACKAGE BASE 22 2 1 4 5 3 12 11 NIC NIC NIC NIC RFIN 6 7 NIC NIC 8 NIC 9 10 NIC NIC NIC NIC 21 23 V REF 24 V DET 25 NIC 26 RFOUT 27 NIC 28 NIC 29 NIC 30 NIC NIC NIC 15 V DD3 14 V GG3 13 NIC 16 NIC 17 V GG4 18 NIC 19 20 V DD4 NIC 32 31 V DD2 NIC 33 NIC 34 V GG2 35 NIC 36 V DD1 37 V GG1 38 NIC 39 40 NIC NIC HMC1121 13529-001 Figure 1. GENERAL DESCRIPTION The HMC1121 is a three-stage, gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), 4 W power amplifier with an integrated temperature compensated on-chip power detector that operates between 5.5 GHz and 8.5 GHz. The HMC1121 provides 28 dB of gain, 44 dBm output IP3, and 36.5 dBm of saturated output power at 30% PAE from a 7 V power supply. The HMC1121 exhibits excellent linearity and it is optimized for high capacity, point to point and point to multipoint radio systems. The amplifier configuration and high gain make it an excellent candidate for last stage signal amplification preceding the antenna. Ideal for supporting higher volume applications, the HMC1121 is provided in a 40-lead LFCSP package.
16

4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

Sep 28, 2020

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Page 1: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz

Data Sheet HMC1121

Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

FEATURES High saturated output power (PSAT): 36.5 dBm at 30% power

added efficiency (PAE) High output third-order intercept (IP3): 44 dBm typical High gain: 28 dB typical High output power for 1 dB compression (P1dB): 36 dBm typical Total supply current: 2200 mA at 7 V 40-lead, 6 mm × 6 mm LFCSP package: 36 mm2

APPLICATIONS Point to point radios Point to multipoint radios Very small aperture terminals (VSATs) and satellite

communications (SATCOMs) Military electronic warfare (EW) and electronic counter

measures (ECM)

FUNCTIONAL BLOCK DIAGRAM

PACKAGEBASE

22

2

1

4

5

3

1211

NIC

NIC

NIC

NIC

RFIN

6

7

NIC

NIC

8NIC

9

10

NIC

NIC

NIC

NIC21

23 VREF

24 VDET

25 NIC

26 RFOUT

27 NIC

28 NIC

29 NIC

30 NIC

NIC

NIC

15V

DD

3

14V

GG

3

13N

IC

16N

IC

17V

GG

4

18N

IC

19 20

VD

D4

NIC

32 31

VD

D2

NIC

33N

IC

34V

GG

2

35N

IC

36V

DD

1

37V

GG

1

38N

IC

3940

NIC

NIC

HMC1121

1352

9-00

1

Figure 1.

GENERAL DESCRIPTION The HMC1121 is a three-stage, gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), 4 W power amplifier with an integrated temperature compensated on-chip power detector that operates between 5.5 GHz and 8.5 GHz. The HMC1121 provides 28 dB of gain, 44 dBm output IP3, and 36.5 dBm of saturated output power at 30% PAE from a 7 V power supply.

The HMC1121 exhibits excellent linearity and it is optimized for high capacity, point to point and point to multipoint radio systems. The amplifier configuration and high gain make it an excellent candidate for last stage signal amplification preceding the antenna.

Ideal for supporting higher volume applications, the HMC1121 is provided in a 40-lead LFCSP package.

Page 2: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

HMC1121* Product Page Quick LinksLast Content Update: 08/30/2016

Comparable PartsView a parametric search of comparable parts

Evaluation Kits• HMC1121 Evaluation Board

DocumentationApplication Notes• AN-1363: Meeting Biasing Requirements of Externally

Biased RF/Microwave Amplifiers with Active Bias Controllers

• Broadband Biasing of Amplifiers General Application Note• MMIC Amplifier Biasing Procedure Application Note• Thermal Management for Surface Mount Components

General Application NoteData Sheet• HMC1121: 4 W, GaAs, pHEMT, MMIC Power Amplifier,

5.5 GHz to 8.5 GHz Data Sheet

Tools and Simulations• HMC1121LP3E S-parameters

Design Resources• HMC1121 Material Declaration• PCN-PDN Information• Quality And Reliability• Symbols and Footprints

DiscussionsView all HMC1121 EngineerZone Discussions

Sample and BuyVisit the product page to see pricing options

Technical SupportSubmit a technical question or find your regional support number

* This page was dynamically generated by Analog Devices, Inc. and inserted into this data sheet. Note: Dynamic changes to the content on this page does not constitute a change to the revision number of the product data sheet. This content may be frequently modified.

Page 3: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

HMC1121 Data Sheet

Rev. 0 | Page 2 of 15

TABLE OF CONTENTS Features .............................................................................................. 1

Applications ....................................................................................... 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Electrical Specifications ............................................................... 3

Absolute Maximum Ratings ............................................................ 4

ESD Caution .................................................................................. 4

Pin Configuration and Function Descriptions ............................. 5

Interface Schematics..................................................................... 6

Typical Performance Characteristics ..............................................7

Theory of Operation ...................................................................... 11

Applications Information .............................................................. 12

Recommended Bias Sequence .................................................. 12

Typical Application Circuit ....................................................... 12

Evaluation Board ............................................................................ 13

Bill of Materials ........................................................................... 13

Evaluation Board Schematic ..................................................... 14

Outline Dimensions ....................................................................... 15

Ordering Guide .......................................................................... 15

REVISION HISTORY 7/2016—Revision 0: Initial Version

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Data Sheet HMC1121

Rev. 0 | Page 3 of 15

SPECIFICATIONS ELECTRICAL SPECIFICATIONS TA = 25°C, VDD = VDD1 = VDD2 = VDD3 = VDD4 = 7 V, IDD = 2200 mA, frequency range = 5.5 GHz to 7.5 GHz.

Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 5.5 7.5 GHz GAIN 24 27 dB

Gain Variation over Temperature 0.01 dB/°C RETURN LOSS

Input 17 dB Output 13 dB

OUTPUT POWER For 1 dB Compression P1dB 35 36 dBm 36 dBm = 4 W Saturated PSAT 36.5 dBm At 30% PAE

OUTPUT THIRD-ORDER INTERCEPT IP3 44 dBm Measurement taken at POUT/tone = 28 dBm SUPPLY

Voltage VDD 5 7.5 V Total Current IDD 2200 mA Adjust the gate control voltage (VGG1 to VGG4) between

−2 V to 0 V to achieve an IDD = 2200 mA typical

TA = 25°C, VDD = VDD1 = VDD2 = VDD3 = VDD4 = 7 V, IDD = 2200 mA, frequency range = 7.5 GHz to 8.5 GHz.

Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments FREQUENCY RANGE 7.5 8.5 GHz GAIN 25 28 dB

Gain Variation over Temperature 0.009 dB/°C RETURN LOSS

Input 15 dB Output 13 dB

OUTPUT POWER For 1 dB Compression P1dB 35 36 dBm 36 dBm = 4 W Saturated PSAT 36.5 dBm At 30% PAE

OUTPUT THIRD-ORDER INTERCEPT IP3 43 dBm Measurement taken at POUT/tone = 28 dBm SUPPLY

Voltage VDD 5 7.5 V Total Current IDD 2200 mA Adjust the gate control voltage (VGG1 to VGG4) between

−2 V to 0 V to achieve an IDD = 2200 mA typical

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HMC1121 Data Sheet

Rev. 0 | Page 4 of 15

ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating Drain Voltage Bias 8 V RF Input Power (RFIN)1 24 dBm Channel Temperature 175°C Continuous Power Dissipation, PDISS (TA = 85°C,

Derate 227 mW/°C Above 85°C) 20.5 W

Thermal Resistance (RTH) Junction to Ground Paddle

4.4°C/W

Maximum Peak Reflow Temperature (MSL3)2 260°C

Storage Temperature Range −65°C to +150°C Operating Temperature Range −40°C to +85°C ESD Sensitivity (Human Body Model) Class 1A,

passed 250 V

1 The maximum input power (PIN) is limited to 24 dBm or to the thermal limits constrained by the maximum power dissipation.

2 See the Ordering Guide section.

Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

ESD CAUTION

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Data Sheet HMC1121

Rev. 0 | Page 5 of 15

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

22

2

1

4

5

3

1211

NIC

NIC

NIC

NIC

RFIN

6

7

NIC

NIC

8NIC

9

10

NIC

NIC

NIC

NIC21

23 VREF

24 VDET

25 NIC

26 RFOUT

27 NIC

28 NIC

29 NIC

30 NIC

NIC

NIC

15V

DD

3

14V

GG

3

13N

IC

16N

IC

17V

GG

4

18N

IC

19 20

VD

D4

NIC

32 31

VD

D2

NIC

33N

IC

34V

GG

2

35N

IC

36V

DD

1

37V

GG

1

38N

IC

3940

NIC

NIC

HMC1121TOP VIEW

(Not to Scale)

NOTES1. NIC = NO INTERNAL CONNECTION.2. EXPOSED PAD. EXPOSED PAD MUST BE

CONNECTED TO THE RF/DC GROUND. 1352

9-00

2

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions Pin No. Mnemonic Description 1 to 4, 6 to 13, 16, 18, 20 to 22, 25, 27 to 31, 33, 35, 38 to 40

NC No Internal Connection. These pins and exposed ground pad must be connected to RF/dc ground.

5 RFIN RF Input. This pin is ac-coupled and matched to 50 Ω. See Figure 3 for the RFIN interface schematic.

14, 17, 34, 37 VGG3, VGG4, VGG2, VGG1

Gate Controls for the Amplifier. Adjust VGG1 through VGG4 to achieve the recommended bias current. External bypass capacitors of 100 pF, 10 nF, and 4.7 μF are required. See Figure 5 for the VGG1 to VGG4 interface schematic.

15, 19, 32, 36 VDD3, VDD4, VDD2, VDD1

Drain Biases for the Amplifier. External bypass capacitors of 100 pF, 10 nF, and 4.7 μF are required. See Figure 8 for the VDD1 to VDD4 interface schematic.

23 VREF Voltage Reference. This pin is the dc bias of the diode biased through the external resistor and is used for the temperature compensation of VDET. See Figure 7 for the VREF interface schematic.

24 VDET Voltage Detection. This pin is the dc voltage representing the RF output power rectified by the diode that is biased through an external resistor. See Figure 4 for the VDET interface schematic.

26 RFOUT RF Output. This pin is ac-coupled and matched to 50 Ω. See Figure 6 for the RFOUT interface schematic.

EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground.

Page 7: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

HMC1121 Data Sheet

Rev. 0 | Page 6 of 15

INTERFACE SCHEMATICS

RFIN 1352

9-00

3

Figure 3. RFIN Interface Schematic

VDET 1352

9-00

4

Figure 4. VDET Interface Schematic

VGG1, VGG2,VGG3, VGG4 13

529-

005

Figure 5. VGG1 to VGG4 Interface Schematic

RFOUT 1352

9-00

6

Figure 6. RFOUT Interface Schematic

VREF 1352

9-00

7

Figure 7. VREF Interface Schematic

VDD1, VDD2,VDD3, VDD4

1352

9-00

8

Figure 8. VDD1 to VDD4 Interface Schematic

Page 8: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

Data Sheet HMC1121

Rev. 0 | Page 7 of 15

TYPICAL PERFORMANCE CHARACTERISTICS

40

30

20

10

0

–10

–20

–304 65 7 8 9 10

RE

SP

ON

SE

(d

B)

FREQUENCY (GHz)

S11S21S22

1352

9-00

9

Figure 9. Response (Broadband Gain and Return Loss) vs. Frequency for S21, S11, and S22

0

–25

–20

–15

–10

–5

5 6 7 8 9

RE

TU

RN

LO

SS

(d

B)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

0

Figure 10. Input Return Loss vs. Frequency at Various Temperatures

40

30

32

34

36

38

5 6 7 8 9

P1d

B (

dB

m)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

1

Figure 11. P1dB vs. Frequency at Various Temperatures

30

20

22

24

26

28

5 6 7 8 9

GA

IN (

dB

)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

2

Figure 12. Gain vs. Frequency at Various Temperatures

0

–25

–20

–15

–10

–5

5 6 7 8 9

RE

TU

RN

LO

SS

(d

B)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

3

Figure 13. Output Return Loss vs. Frequency at Various Temperatures

40

30

32

34

36

38

5 6 7 8 9

P1d

B (

dB

m)

FREQUENCY (GHz)

6V7V

1352

9-01

4

Figure 14. P1dB vs. Frequency at Various Supply Voltages

Page 9: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

HMC1121 Data Sheet

Rev. 0 | Page 8 of 15

40

30

32

34

36

38

5 6 7 8 9

PS

AT (

dB

m)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

5

Figure 15. PSAT vs. Frequency at Various Temperatures

40

30

32

34

36

38

5 6 7 8 9

P1d

B (

dB

m)

FREQUENCY (GHz)

1800mA2000mA2200mA2400mA

1352

9-01

6

Figure 16. P1dB vs. Frequency at Various Supply Currents (IDD)

48

36

38

42

46

40

44

5 6 7 8 9

IP3

(dB

m)

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-01

7

Figure 17. Output IP3 vs. Frequency at Various Temperatures, POUT/Tone = 28 dBm

40

30

32

34

36

38

5 6 7 8 9

PS

AT (

dB

m)

FREQUENCY (GHz)

6V7V

1352

9-01

8

Figure 18. PSAT vs. Frequency at Various Supply Voltages

40

30

32

34

36

38

5 6 7 8 9

PS

AT (

dB

m)

FREQUENCY (GHz)

1800mA2000mA2200mA2400mA

1352

9-01

9

Figure 19. PSAT vs. Frequency at Various Supply Currents (IDD)

48

36

38

42

46

40

44

5 6 7 8 9

IP3

(dB

m)

FREQUENCY (GHz)

1800mA2000mA2200mA2400mA

1352

9-02

0

Figure 20. Output IP3 vs. Frequency at Various Supply Currents, POUT/Tone = 28 dBm

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Data Sheet HMC1121

Rev. 0 | Page 9 of 15

48

36

38

42

46

40

44

5 6 7 8 9

IP3

(dB

m)

FREQUENCY (GHz)

6V7V

1352

9-02

1

Figure 21. Output IP3 vs. Frequency at Various Supply Voltages, POUT/Tone = 28 dBm

60

50

40

30

20

10

016 18 20 22 24 26 28 30 32 34

IM3

(dB

c)

POUT/TONE (dBm)

5.5GHz6.5GHz7.5GHz8.5GHz

1352

9-02

2

Figure 22. Output Third-Order Intermodulation (IM3) vs. POUT/Tone at VDD = 7 V

40

0

10

5

15

25

35

20

30

–14 –10 –6 2–2 106 14

PO

UT

(dB

m),

GA

IN (

dB

), P

AE

(%

)

INPUT POWER (dBm)

3000

2900

2800

2700

2600

2500

2400

2300

2200

2100

2000

I DD

(m

A)

POUTGAINPAEIDD

1352

9-02

3

Figure 23. POUT, Gain, PAE, and IDD vs. Input Power at 7 GHz

60

50

40

30

20

10

016 18 20 22 24 26 28 30 32 34

IM3

(dB

c)

POUT/TONE (dBm)

5.5GHz6.5GHz7.5GHz8.5GHz

1352

9-02

4

Figure 24. Output IM3 vs. POUT/Tone at VDD = 6 V

60

50

40

30

20

10

016 18 20 22 24 26 28 30 32 34

IM3

(dB

c)

POUT/TONE (dBm)

5.5GHz6.5GHz7.5GHz8.5GHz

1352

9-02

5

Figure 25. Output IM3 vs. POUT/Tone at VDD = 8 V

40

35

30

25

201800 2000 2200 2400

GA

IN (

dB

), P

1dB

(d

Bm

), P

SA

T (

dB

m)

IDD (mA)

GAINP1dBPSAT

1352

9-02

6

Figure 26. Gain, P1dB, and PSAT vs. Supply Current (IDD) at 7 GHz

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HMC1121 Data Sheet

Rev. 0 | Page 10 of 15

40

35

30

25

206.0 6.5 7.0 7.5 8.0

GA

IN (

dB

), P

1dB

(d

Bm

), P

SA

T (

dB

m)

VDD (V)

GAINP1dBPSAT

1352

9-02

7

Figure 27. Gain, P1dB, and PSAT vs. Supply Voltage (VDD) at 7 GHz

20

18

16

14

12

10–14 –10 –8 –6 –4 0 4 6 82–12 –2 10 12

PO

WE

R D

ISS

IPA

TIO

N (

W)

INPUT POWER (dBm)

5.5GHz6.5GHz7.5GHz8.5GHz

1352

9-02

8

Figure 28. Power Dissipation vs. Input Power at TA = 85°C

0

–90

–70

–50

–30

–10

–80

–60

–40

–20

RE

VE

RS

E I

SO

LA

TIO

N (

dB

)

5 6 7 8 9

FREQUENCY (GHz)

+85°C+25°C–40°C

1352

9-02

9

Figure 29. Reverse Isolation vs. Frequency at Various Temperatures

10

1

0.1

0.01

0.001–10 0 10 20 30 40

VR

EF –

VD

ET (

V)

OUTPUT POWER (dBm)

5.5GHz7.0GHz8.5GHz

1352

9-03

0

Figure 30. Detector Voltage (VREF − VDET) vs. Output Power at Various Frequencies

10

1

0.1

0.01

0.001–10 0 10 20 30 40

VR

EF –

VD

ET (

V)

OUTPUT POWER (dBm)

+85°C+25°C–40°C

1352

9-03

1

Figure 31. Detector Voltage (VREF − VDET) vs. Output Power at Various Temperatures, at 7 GHz

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Data Sheet HMC1121

Rev. 0 | Page 11 of 15

THEORY OF OPERATION The HMC1121 is a three-stage, gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), 4 W power amplifier consisting of three gain stages in series. A simplified block diagram is shown in Figure 32. The input signal is divided evenly into two; each of these two paths are amplified through three independent gain stages. The amplified signals are then combined at the output.

1352

9-03

2

VGG1, VGG2

RFIN

VDD2VDD1

RFOUT

VGG3, VGG4VDD4VDD3

Figure 32. Simplified Block Diagram

The HMC1121 has single-ended input and output ports whose impedances are nominally matched to 50 Ω internally over the 5.5 GHz to 8.5 GHz frequency range. Consequently, it can directly insert into a 50 Ω system without the need for impedance matching circuitry. In addition, multiple HMC1121 amplifiers can be cascaded back to back without the need of external matching circuitry. Similarly, multiple HMC1121 amplifiers can be used with power dividers at the input and power combiners at the output to obtain higher output power levels.

The input and output impedances are sufficiently stable vs. variations in temperature and supply voltage that no impedance matching compensation is required.

It is critical to supply very low inductance ground connections to the ground pins as well as to the backside exposed pad to ensure stable operation.

To ensure the best performance out of the HMC1121, do not exceed the absolute maximum ratings.

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HMC1121 Data Sheet

Rev. 0 | Page 12 of 15

APPLICATIONS INFORMATION Figure 33 shows the basic connections for operating the HMC1121 and also see the Theory of Operation section for additional information. The RF input and RF output are ac-coupled by the internal dc block capacitors.

RECOMMENDED BIAS SEQUENCE Follow the recommended bias sequencing to avoid damaging the amplifier.

During Power-Up

The recommended bias sequence during power-up is the following:

1. Connect to ground. 2. Set VGGx to −2 V. 3. Set VDDx to 7 V. 4. Increase VGGx to achieve a typical IDD = 2200 mA. 5. Apply the RF signal.

During Power-Down

The recommended bias sequence during power-down is the following:

1. Turn the RF signal off. 2. Decrease VGGx to −2 V to achieve a typical IDD = 0 mA.

3. Decrease VDDx to 0 V. 4. Increase VGGx to 0 V.

The bias conditions previously listed (VDDx = 7 V, IDD = 2200 mA), are the recommended operating point to acheive optimum performance. The data used in this datasheet is taken with the recommended bias conditions. When using the HMC1121 with different bias conditions, different performance may result than what is shown in the Typical Performance Characteristics section.

The VDET and VREF pins are the output pins for the internal power detector. The VDET pin is the dc voltage output pin that represents the RF output power rectified by the internal diode, which is biased through an external resistor.

The VREF pin is the dc voltage output pin that represents the reference diode voltage, which is biased through an external resistor. This voltage is then used to compensate for the temperature variation effects on both diodes. A typical circuit is shown in the Typical Application Circuit section that reads out the output voltage and represents the RF output power is shown in Figure 33.

TYPICAL APPLICATION CIRCUIT

J1RFIN

J2RFOUT

VGG3

VDD3

+C1310nF

C6100pF

R320Ω

R420Ω

C1510nF

C7100pF

C1610nF

C224.7µF

+C234.7µF

VGG4C8100pF

C214.7µF +

C224.7µF

+ C1310nF

C5100pF

100kΩ 100kΩ

10kΩ

10kΩ

10kΩ

10kΩ

+5V +5V

–5V

VOUT = VREF – VDET

SUGGESTED CIRCUIT

R120Ω

C1100pF

C910nF

C174.7µF +

VGG1

C3100pF

C1110nF

C184.7µF

+VDD1

R220Ω

C2100pF

C4100pF

C1010nF

C1210nF

+C194.7µF

VGG2

VDD4

+ C204.7µF

VDD2

22

2

1

45

3

1211

NIC

NIC

NIC

NIC

6

7

NIC

NIC

8NIC

9

10

NIC

NIC

NIC

NIC21

23 VREF

24 VDET25 NIC

2627 NIC

28 NIC

29 NIC

30 NIC

NIC

NIC

15V

DD

3

14V

GG

313

NIC

16N

IC17

VG

G4

18N

IC19 20

VD

D4

NIC

32 31

VD

D2

NIC

33N

IC

34V

GG

235

NIC

36V

DD

1

37V

GG

138

NIC

3940

NIC

NIC

HMC1121

1352

9-03

3

Figure 33. Typical Application Circuit

Page 14: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

Data Sheet HMC1121

Rev. 0 | Page 13 of 15

EVALUATION BOARD The HMC1121 evaluation printed circuit board (PCB) is a 2-layer board that was fabricated using a Rogers 4350 and best practices for high frequency RF design. The RF input and RF output traces have a 50 Ω characteristic impedance. The PCB is attached to a heat sink by a SN96 solder, which provides a low thermal resistance path. Components are mounted using SN63 solder, allowing rework of the surface-mount components without compromising the circuit board to heat sink attachment.

The evaluation PCB and populated components operate over the −40°C to +85°C ambient temperature range. During operation, attach the evaluation PCB to a temperature controlled plate to control the temperature. For proper bias sequence, see the Applications Information section.

See Figure 35 for the HMC1121 evaluation board schematic. A fully populated and tested evaluation board, which is shown in Figure 34, is available from Analog Devices, Inc., upon request.

1352

9-03

4

Figure 34. HMC1121 Evaluation Board

BILL OF MATERIALS

Table 5. Item Description J1, J2 PCB mount SMA RF connector, Johnson PN 142-07010851 J3, J4 DC pins J5, J6 RF connectors for thru line; not populated C1 to C8 100 pF capacitors, 0402 package C9 to C16 10 nF capacitors, 0402 package C17 to C24 4.7 μF capacitor, Case A R1 to R4 20 Ω resistors, 0402 package R5, R6 100 kΩ resistors, 0402 package U1 HMC1121LP6GE Heat sink Used for thermal transfer from the HMC1121LP6GE amplifier PCB 600-01061-00 evaluation board; circuit board material: Rogers 4350

Page 15: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

HMC1121 Data Sheet

Rev. 0 | Page 14 of 15

EVALUATION BOARD SCHEMATIC

1352

9-03

5

J1 J2

VG3

VD3

+C1410nF

C6100pF

R320Ω

R420Ω

C1510nF

C7100pF

C1610nF

C244.7µF

+C234.7µF

VG4C8100pF

C214.7µF +

C224.7µF

+ C1310nF

C5100pF

R120Ω

C1100pF

C910nF

C174.7µF +

VG1

C3100pF

C1110nF

C184.7µF

+VD1

R220Ω

C2100pF

C4100pF

C1010nF

C1210nF

+C194.7µF

VG2

VD4

+ C204.7µF

VD2

2

1

4

5

3

1211

NC

NC

NC

NC

RFIN U16

7NC

NC8 NC9

10NC

NC

NC

NC

VREF

VDET

25

24

23

22

21

RFOUT

NC

NC

NC

NC

30

12J4

J3

87759-1250

10

8

6

4

2

VD4

VD5 VD6

VG4

VD3

VG3

11

9

7

5

3

1

29

28

27

26

NC

NC

NC

15V

D3

14V

G3

13N

C

16N

C17

VG

4

18N

C19 20

VD

4

NC

32 313334353637383940

VD

2

NC

NC

VG

2

NC

VD

1

VG

1

NC

NC

NC

RFIN RFOUT

J6DEPOP

J5DEPOP

THRUCAL

R5100kΩVDET

VREFR6

100kΩ

87759-0850

8

6

4

2

VG1

VD1

VG2

VD2

7

5

3

1

Figure 35. HMC1121 Evaluation Board Schematic

Page 16: 4 W, GaAs, pHEMT, MMIC Power Amplifier, 5.5 GHz to 8.5 GHz ... · NIC 16 NIC 17 GG4 18 NIC 19 20 V DD4 NIC 32 31 V 33 NIC DD2 NIC 34 V GG 2 36 35 NIC V DD1 37 V 38 NIC GG1 40 39 NIC

Data Sheet HMC1121

Rev. 0 | Page 15 of 15

OUTLINE DIMENSIONS

03

-31

-20

15-

A

0.50BSC

BOTTOM VIEWTOP VIEW

PIN 1INDICATOR

EXPOSEDPAD

PIN 1INDICATOR

SEATINGPLANE

0.05 MAX0.02 NOM

0.20 REF

4.50 REF

COPLANARITY0.08

0.300.250.20

6.106.00 SQ5.90

0.900.850.80

FOR PROPER CONNECTION OFTHE EXPOSED PAD, REFER TOTHE PIN CONFIGURATION ANDFUNCTION DESCRIPTIONSSECTION OF THIS DATA SHEET.

0.350.300.25

0.20 MIN

4.754.70 SQ4.65

COMPLIANT TO JEDEC STANDARDS MO-220

40

1

1110

20

21

30

31

Figure 36. 40-Lead Lead Frame Chip Scale Package [LFCSP]

6 mm × 6 mm Body and 0.85 mm Package Height (HCP-40-1)

Dimensions shown in millimeters

ORDERING GUIDE Model1 Temperature MSL Rating2 Package Description3 Package Option Branding4 HMC1121LP6GE −40°C to +85°C MSL3 40-Lead Lead Frame Chip Scale Package [LFCSP] HCP-40-1

XXXX

H1121

HMC1121LP6GETR −40°C to +85°C MSL3 40-Lead Lead Frame Chip Scale Package [LFCSP] HCP-40-1

XXXX

H1121

EV1HMC1121LP6G Evaluation Board 1 The HMC1121LP6GE and the HMC1121LP6GETR are RoHS-Compliant Parts. 2 See the Absolute Maximum Ratings section for additional details. 3 The HMC1121LP6GE and the HMC1121LP6GETR are low stress injection molded plastic and their lead finish is 100% matte Sn. 4 The HMC1121LP6GE and the HMC1121LP6GETR 4-digit lot numbers are represented by XXXX.

©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D13529-0-7/16(0)