2.4 PMC Sierra AMS Netlister

OSS-based AMS Verification using irunOSS-based AMS Verification using irunAshok Dayalan – PMC Sierra

Ramkumar Madhavan, Vivek Astvansh, Vijay Setia – Cadence Design Systems

AgendaAgenda

� Introduction

� OSS-based AMS flow using irun

� Comparison with other AMS flows

� Migration to OSS-based AMS flow

� Summary

Introduction: Why Mixed-Signal Verification?Introduction: Why Mixed-Signal Verification?

� Complexity:

- 100s of modes + 1000s of settings

- Complex algorithms to work in sync with digital blocks- Deep submicron CMOS

Percentage (%)

Time (years)

SOCs containing analog circuitry

Area of analog circuitry in the SOC

Shift in focus:From

performance to functionality!

Introduction: Performing Mixed-Signal VerificationIntroduction: Performing Mixed-Signal Verification

� Cadence Solutions:

Spectre

Ultrasim

NC-SimVerilog-XL

(Digital simulator)Spectre

(Analog simulator)

Cell-Based netlisterwith 3-step

simulation (ncvlog, ncelab, ncsim)

OSS-Based Netlisterwith irun

SpectreVerilog AMSDesigner

OSS-based AMS flow using irunOSS-based AMS flow using irun

� What is AMS Designer (AMSD)?

Verilog-A VHDL

SpectreHSPICE

VerilogSystemC

SystemVerilog

Verilog-AMS VHDL-AMS

Virtuoso AMS Designer SimulatorSpectre (in AMS-Spectre mode)

orUltraSim (in AMS-Ultra mode)

IncisiveDigital Engine

Ansi-C/C++

Matlab/Simulink

Specman

OSS-based AMS flow using irunOSS-based AMS flow using irun

� How does AMSD work?

Courtesy: Cadence

1: Compilation (ncvlog, ncvhdl):- Compiles source code to create binary

files (*.pak files)

2: Elaboration (ncelab):- Links all source modules (like a linker) - Partitions the design- Inserts Connect Modules between

analog and digital blocks - Creates a snapshot of the initial

state of the design

3: Simulation (ncsim):- Performed by one kernel, combining

NC-sim and Spectre binaries - Works on the snapshot (created by

elaborator) which contains the initial conditions for the simulation.

OSS-based AMS flow using irunOSS-based AMS flow using irun

What is “irun”?� New utility for AMS simulation� Digital verification use model

� Single executable

� Supports a broad mixed-language base (.v, va, .vams, .vhd .vhdams, .sv, .sc, .e,..)

� File-extension based compilation

ncvlog -ams -cdslib cds.lib ./source/digital/*.v

ncelab work.test connLib.ConnRules18V -cdslib cds.lib -hdlvar hdl.var -snap top:snap-discipline logic -prop prop.cfg

ncsim top:snap -amslic -cdslib cds.lib -analogcontrol top.scs –input probe.tcl

irun ./source/digital/*.v ./amscf.scs –amsf –input probe.tcl

OSS-based AMS flow using irunOSS-based AMS flow using irun

� Usage:

runams – Command line use modelrunams – Command line use model

� “runams”

- Command line exe to netlist the design using the OSS-based netlister

- Simulates the output netlist using “irun”- Can be used to netlist, compile, elaborate, simulate and plot from command line

� Use model similar to “amsdesigner” exe that provides for netlisting using the Cellview-based netlister and simulation using the 3-step simulation mode (ncvlog, ncelab, ncsim)

� Example

%> runams -lib mylib -cell top -view config -netlist -simulate

-analogcontrol ./analog.scs -tcl probe.tcl -modelfile myModels.scs-rundir top_run1 -connectrules ConnRules_5V_full

Comparison with other flowsComparison with other flows

SpectreVerilog Cell-based AMS flow

OSS-based AMS flow (irun)

Digital solver Verilog-XL NC-Sim NC-Sim

Analog solver(s) Spectre Spectre/Ultrasim/APS

Spectre/Ultrasim/APS

Single netlist No No Yes

Spectre compatible Yes No Yes

Support for VHDL No Good Better

One-step flow (irun) No No Yes

5x structure No Yes No (faster elaboration)

Migration to OSS-based AMS flowMigration to OSS-based AMS flow

� VHDL support:- Avoid verilog wrappers

(shell views) around VHDL modules

- Specify complete path of

pre-compiled VHDL libs in ‘irun options’ form

Migration to OSS-based AMS flowMigration to OSS-based AMS flow

� DFII Text views- Text views (DFII views

corresponding to RTL code, etc..) require .cdb/.oa files (shadow database)

- Create the .cdb/.oa by selecting “ADE -> Tools -> Update Text Views”

Migration to OSS-based AMS flowMigration to OSS-based AMS flow

� Cellview-based netlister configuration views have ‘symbol’ in stop view list

- OSS-based netlister treats ‘symbol’ view as a digital cellview- CDF information (W, L etc.) will not be read- Use ‘AMS Spectre’ template (not ‘AMS’ or ‘AMS compatibility’) to build

configurations

� Solution:- Enable CDF to be read for symbol view using the following steps:

- “ADE -> Simulation -> Options -> Netlister”- In “Netlist using spectre CDF simInfo” include ‘symbol’ to the existing view list

[or]- Add ‘spectre’ to the stop view list of the configuration

SummarySummary

� Overview of AMSDesigner

� OSS-based AMS netlister flow using irun

� irun (utility employed by OSS-based AMS netlister)

� Usage of OSS-based AMS flow

� runams

� OSS-based flow versus SpectreVerilog and Cell-based flow

� Points to remember while migrating to OSS-based flow