2. IEEE Journal of Emerging and Selected Topics in Power Electronics Volume issue 2015 [doi 10.1109%2Fjestpe.2015.2405094] Reza, Md. Shamim_ Ciobotaru, Mihai_ Agelidis, Vassilios --

2168-6777 (c) 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. Seehttp://www.ieee.org/publications_standards/publications/rights/index.html for more information.

This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI10.1109/JESTPE.2015.2405094, IEEE Journal of Emerging and Selected Topics in Power Electronics

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Single-Phase Grid Voltage Frequency Estimation Using Teager Energy Operator Based Technique

Md. Shamim Reza, Student Member, IEEE, Mihai Ciobotaru, Senior Member, IEEE, and Vassilios G. Agelidis, Senior Member, IEEE

AbstractThis paper reports the performance of a technique for the estimation of single-phase grid voltage fundamental frequency under distorted grid conditions. The technique combines a Teager energy operator with a frequency adaptive band-pass filter. The Teager energy operator is based on three consecutive samples and is used to estimate the fundamental frequency. The band-pass filter relies on a recursive discrete Fourier transform (RDFT) and an inverse RDFT, and is used to extract the normalised amplitude of the grid voltage fundamental component. The technique is computationally efficient and can also reject the negative effects caused by DC offset and harmonics. It requires less computational effort, can provide faster estimation and is also less affected by harmonics as compared to a technique relying on the RDFT based decomposition of the single-phase system into orthogonal components. The performance of the technique is verified by using both simulation and experimental results.

Index TermsDiscrete Fourier transform, frequency estimation, monitoring, single-phase voltage system, and Teager energy operator.

I. INTRODUCTION

The grid voltage fundamental frequency in AC electricity networks is a key parameter that constantly is required to be monitored and controlled. This requirement is necessary in the context of modern technological developments such as microgrids in order to maintain the active power balance [1-5]. The frequency control of a microgrid is important during the transitions between grid-connected and islanding modes, where high deviations of frequency can occur [6, 7]. The IEEE standard 1547 defines that the frequency of a microgrid cannot differ from the grid frequency more than 0.1% during the reconnection with the grid [6, 7].

Any digital signal processing (DSP) technique used for grid voltage frequency estimation should be fast, accurate and robust in the presence of grid disturbances such as voltage transients, DC offset and harmonics. The technique should also be simple and computationally efficient which will contribute to an economical realization of the smart grid vision [8] for phasor measurement units [9, 10], smart meters [11, 12], load shedding and restoration functions [13, 14], and power quality analysis [15].

Many DSP techniques for estimating the grid voltage fundamental frequency have been reported in the technical

literature. Among these techniques, the zero crossing detection is a relatively simple one to implement [16]. The presence of noise may introduce multiple zero crossings which may lead to erroneous estimations and hence a pre-filtering of voltage is required [16]. The frequency estimation by using a single-phase phase-locked loop (PLL) requires a virtual orthogonal voltage system, where there is less information in single-phase systems than in three-phase ones [17-20]. The PLL also requires an optimal tuning of the parameters to obtain a trade-off between good dynamics and estimation accuracy under grid disturbances [21]. On the other hand, a frequency-locked loop (FLL) based single-phase grid voltage frequency estimation technique also requires a virtual orthogonal voltage system [22, 23]. There is also a compromise required between good dynamics and estimation accuracy obtained by the FLL under distorted grid conditions [22, 23]. A technique based on Kalman filter (KF) can also be used to obtain the grid voltage fundamental frequency [24, 25]. The accuracy and stability of the KF depends on the model used for analysis and the tuning of the parameters. The KF is also complex and computationally demanding for real-time implementations. The Newton-type algorithm (NTA) is a nonlinear technique for frequency estimation and may also suffer from instability due to a large voltage transient [11, 12]. The complexity of the NTA also increases when the number of harmonics increases [26]. The computational burden of the NTA under distorted grid conditions can be reduced by using a pre-filter at the cost of a poor dynamic response [11, 12]. The demodulation based frequency estimation techniques require implementation of a computationally demanding finite-impulse-response (FIR) filter [9, 10, 27]. The Prony method requires prior knowledge of the number of modal components present in the grid voltage and is also computationally demanding due to the handling of a large size window and rooting of a high-order polynomial [28, 29]. On the other hand, three consecutive samples (3CS) based frequency estimation technique is ill-conditioned when the middle voltage sample is equal or close to zero [7]. This ill-condition can be avoided by holding the previously estimated frequency, however, the methodology of determining the threshold value of the middle sample is not reported in [7]. In this case, a recursive algorithm is reported in [30], which does not need to set the threshold value of the middle voltage sample. However, the 3CS based techniques, as reported in [7, 30], require the implementation of the computationally demanding FIR filter to reject the effects of harmonics and noise. Another technique based on a Teager energy operator (TEO), which also relies on the 3CS and does not suffer from the ill-condition due to a zero or low value of a voltage sample, can also be applied to estimate the grid voltage

The authors are with the Australian Energy Research Institute, The University of New South Wales, Sydney, NSW 2052, Australia, and also with the School of Electrical Engineering and Telecommunications, The University of New South Wales, Sydney, NSW 2052, Australia (e-mail: [email protected]; [email protected]; [email protected]).



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frequency [31-34]. However, the performance of the TEO is affected under distorted grid conditions [31-34].

The discrete Fourier transform (DFT) is a basic technique for spectral analysis but can lead to inaccurate results due to spectral leakage and picket fence effect during time-varying cases [35-37]. The spectral leakage information can also be used to obtain the fundamental frequency [35, 36]. However, large size moving windows for three DFT operations, which increases the computational burden, are required to avoid the interference caused by lower order harmonics [35, 36]. The spectral leakage can also be reduced by using a desirable sidelobe window based DFT [37]. Iterative approaches based on the DFT can also be used for frequency estimation at the expense of a high computational burden [38]. The computational effort of the DFT can be reduced by using it recursively [39]. The recursive DFT (RDFT) may suffer from an accumulation error, however, can be removed by careful coding [40, 41] or several other algorithms as reported in [39] at the cost of additional complexity and computational burden. An adaptive RDFT based PLL can be used to estimate the fundamental frequency [42]. However, it requires an additional numerically controlled oscillator and variable sampling frequency [42]. The variable sampling frequency approach may not be suitable when a low cost micro-controller is used, since the parameters of other digital algorithms implemented on the same micro-controller has to be adjusted for the new sampling frequency. On the other hand, the frequency estimation by using a fixed window RDFT based decomposition of a single-phase system into orthogonal components (RDFT-OC) technique requires high-order FIR low-pass filter (LPF) to reject the negative effects caused by harmonics [15].

The objective of this paper is to report the performance of a computationally efficient DSP technique for instantaneous estimation of the single-phase grid voltage fundamental frequency under distorted grid conditions. The technique uses a fixed sampling frequency and combines the TEO with a frequency adaptive band-pass filter (BPF). The 3CS based TEO is used to estimate the frequency. The RDFT and inverse RDFT (IRDFT) principles are used to implement the BPF, which is used to extract the normalised amplitude of the grid voltage fundamental component. A linear interpolation operation is combined with the RDFT in order to improve the performance of the BPF when the number of voltage samples in one fundamental cycle is not an integer value. The RDFT and TEO based (RDFT-TEO) technique and its preliminary simulation results under limited operating conditions of the grid voltage were reported in [43]. On the other hand, a detail theoretical analysis of the technique with a simplified TEO is documented in this paper. Moreover, based on standard requirements under a wide range of frequency variation [44, 45], both simulation and experimental performances of the RDFT-TEO technique are reported in this paper.

The rest of the paper is organized as follows. The RDFT-TEO technique is described in Section II. Section III contains the simulation results of the technique. The experimental performance comparison of the RDFT-TEO and RDFT-OC [15] techniques are presented in Section IV. Finally, the conclusions are summarized in Section V.

II. RDFT-TEO TECHNIQUE

A. Grid Voltage Fundamental Component Estimation The DFT of the grid voltage waveform, v(n), at the n

sampling instant can be expressed by [46-48]

2

1

kin jN

ki n N

V n v i e

(1)

where k (k=0,1,2,,N-1) is the frequency index, N is the number of voltage samples present in a window, and j is the complex operator. In this paper, the window size of the DFT is frequency adaptive and chosen as one fundamental cycle, hence the frequency resolution (f) is f=f, where f is the grid voltage fundamental frequency. Similar to (1), the DFT of the grid voltage waveform at the (n-1) sampling instant can be expressed by

21

1kin j

Nk

i n NV n v i e

(2)

The following recursive relation can be obtained by subtracting (2) from (1).

2

1knj

Nk kV n V n v n v n N e

(3)

Equation (3) is called the RDFT and can be used to estimate the spectral contents present in the grid voltage waveform [39]. On the other hand, the time domain voltage waveform for a single frequency kf can be obtained by taking the inverse transform of (3). Therefore, based on the IRDFT, the instantaneous time domain voltage waveform for the single frequency kf can be obtained by [46]

21 knj N

k kv n V n eN

(4)

The RDFT and IRDFT, as given by (3) and (4), respectively, can be cascaded in series to implement a digital BPF at the center frequency kf. The discrete transfer function of the BPF at the center frequency kf can also be achieved from (3) and (4). The following expression is obtained from (4) after using the value of Vk(n), as given in (3).

21 11

knjN

k kv n V n e v n v n NN N

(5)

By replacing n with n-1, equation (4) can also be expressed as

2 211 1

k knj jN N

k kv n e V n eN

(6)

By combining (5) and (6), the following relation is obtained.

2 11

kjN

k kv n v n e v n v n NN

(7)

The following discrete transfer function is obtained after performing the z-transform of (7).

2 / 1

1( )1

Nk

k j k N

v z zH zv z N e z

(8)



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The Bode plot of H1(z) (for k=1) at the centre frequency equal to the grid voltage nominal fundamental frequency (50 Hz) is shown in Fig. 1. As it can be noticed, H1(z) can reject odd and even harmonics including the DC offset. Moreover, H1(z) provides unity amplitude and does not introduce any phase lag/lead at the fundamental frequency. During the frequency dynamics, the time-varying harmonics can also be removed adaptively from the grid voltage fundamental component by updating the value of N=fs/f, where fs is the sampling frequency. However, the value of N can be an integer or non-integer under dynamic conditions. H1(z) can reject harmonics effectively when the value of N is integer. For a non-integer value of N i.e. L



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The fundamental voltage amplitude can also be estimated from the real and imaginary parts of the RDFT and is given by [46]

2 2

1 1 12 Re ImA n V n V nN

(13)

The estimated fundamental voltage amplitude can be used to normalize the estimated instantaneous fundamental voltage component. Therefore, the normalised amplitude of the grid voltage fundamental component can be obtained by

11 11

( )= =sin ( ) +u sv n

v n n nTA n

(14)

where the superscript u of 1 ( )uv n indicates that the estimated fundamental voltage component has unity amplitude.

C. Fundamental Frequency Estimation The TEO is a nonlinear operator and can be used to

estimate the energy of a sinusoidal signal [31-34]. The value of the TEO is equal to the square of the product among amplitude, angular frequency and sampling time [31-34]. It is reported in [31] that the TEO can be obtained from the three consecutive samples of a discrete sinusoidal signal. Therefore, based on the constant fundamental parameters within the three consecutive samples of v1, the following relation can be obtained to get the value of TEO [31-34].

22 2

1 1 1 1sin 1 2sA n n T v n v n v n

2 2 2 21 1 1 11 2sA n n T v n v n v n (15)

where sin{(n)Ts} (n)Ts for a high sampling frequency (fs>8f) [31]. It can be seen from the technical literature that the TEO, as given by (15), can be used to estimate the fundamental voltage amplitude of the grid voltage, where the fundamental frequency is known or estimated separately [31-34]. On the other hand, it can be noticed from (15) that the fundamental frequency can also be estimated by using the TEO, where the fundamental voltage amplitude is unity or estimated separately. Therefore, the TEO is used in this paper to estimate the grid voltage fundamental frequency. Based on the normalised amplitude of the fundamental voltage waveform, as obtained by (14), equation (15) can be expressed as

21 1 1sin 1 2u u usn T v n v n v n (16)

In order to avoid the inverse trigonometric function operation, sin{(n)Ts} in (16) can be approximated by

0sin sins s sn T T n T 0 0sin cos cos sins s s sT n T T n T 0 0 0 0sin cos 2s s s sT n T T S fT C (17)

where =0+, 0 =2f0 is the nominal fundamental angular frequency, f0 is the nominal fundamental frequency, =2f is the fundamental angular frequency deviation, f is the fundamental frequency deviation, cos{(n)Ts} 1, sin{(n)Ts} (n)Ts, S0=sin(0Ts) and C0=cos(0Ts). As it can be seen, both S0 and C0 are constants and can be estimated offline. Therefore, the fundamental frequency deviation can be estimated from (16) and (17) by using only three consecutive samples of the normalised amplitude of the fundamental voltage waveform and is expressed by

21 1 1 0

0

1 2

2

u u u

s

v n v n v n Sf n

T C

(18)

where indicates absolute value. The actual fundamental frequency can be obtained by

0f n f f n

(19)

D. Block Diagram Implementation of the RDFT-TEO Technique

The block diagram implementation of the RDFT-TEO technique for the single-phase grid voltage fundamental frequency estimation is shown in Fig. 3. The BPF is implemented based on (11), (12), (13) and (14). On the other hand, the TEO is implemented based on (18). It can be noticed from Fig. 3 that 1 ( )

uv n is obtained by using the frequency adaptive BPF. The value of 1 ( )

uv n is then used to estimate the fundamental frequency deviation by using the TEO. Only three consecutive voltage samples are required for the TEO and hence can provide fast estimation of frequency deviation. The estimated fundamental frequency is also fed back to obtain the number of voltage samples present in one

1z

1z

cos(2 / )n N

sin(2 / )n N

v n

1uv n

2 2. .

1(1 ) L Lb z bz

1z 1z

2.

. f n

0S

01/2 sT C

Teager Energy Operator

Band-Pass Filter

0f

f n f n

N / .sf

st1 orderIIR LPF

Fig. 3. Block diagram implementation of the RDFT-TEO technique for the single-phase grid voltage fundamental frequency estimation.



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fundamental cycle. As there is an interdependent loop present in Fig. 2, the fast tracking of the fundamental frequency, when compared with the estimation of the normalised amplitude of the fundamental voltage component, will affect the stability of the technique [50, 51]. Therefore, a first-order infinite-impulse-response (IIR) LPF can be cascaded in series with the TEO, as shown in Fig. 2, for ensuring a smaller bandwidth with respect to the estimation of the amplitude normalized fundamental voltage component [50, 51]. The use of LPF also helps to reject high frequency disturbances present in the estimated frequency under distorted grid conditions. The settling time ( )LPFT obtained by the first-order IIR LPF can be approximated by [23]

5 /LPF cutT (20)

where cut is the angular cut-off frequency of the LPF. The following condition has to be satisfied for the stability purpose of the RDFT-TEO technique.

2LPF s RDFTT T T (21)

where RDFTT is the time delay provided by the BPF during dynamics. Based on an assumption 2RDFT sT T

i.e. for a high sampling frequency, expression (21) can be approximated by

LPF RDFTT T 5 /cut RDFTT (22)

The window size of the BPF is used as one fundamental time period and it changes under variable frequency environment. However, this variation is small and hence the value of TRDFT can be approximated by 20 ms for the 50 Hz system. Therefore, the approximated value of the angular cut-off frequency of the LPF can be expressed by

250 rad/scut (23)

It can be seen from Fig. 2 that the BPF and the TEO require only few mathematical operations and two trigonometric functions. A lookup table can be used for the trigonometric functions for online implementation [52]. Therefore, the RDFT-TEO technique is relatively simple to implement on a low cost digital signal processor for real-time frequency estimation of the single-phase grid voltage waveform.

III. SIMULATION RESULTS

The simulation performance of the RDFT-TEO technique is documented in this section. The simulations are carried out in MATLAB/Simulink. A first-order discrete IIR Butterworth LPF with the cut-off frequency 39.8 Hz ( 250cut rad/s) is used in the technique. The sampling frequency is chosen as fs=10 kHz. The fundamental frequency variation range (507.5 Hz) is used based on the specification of the IEC standard 61000-4-30 [44]. The estimation of the fundamental frequency steps 7.5 Hz is shown in Fig. 4, where the grid voltage contains only fundamental component with unity amplitude. As it can be seen, the settling time of the RDFT-TEO technique is around 1.5 fundamental cycles and is less

1.99 2 2.01 2.02 2.03 2.04 2.0542

43

44

45

46

47

48

49

50

1.99 2 2.01 2.02 2.03 2.04 2.0550

51

52

53

54

55

56

57

58

Time (s)

Fund

amen

tal

Freq

uenc

y (H

z)

RDFT-TEOActual

Fund

amen

tal

Freq

uenc

y (H

z)

(b)

(a)

RDFT-TEOActual

Fig. 4. Simulated frequency steps estimation. (a) -7.5 Hz (50 Hz to 42.5 Hz). (a) +7.5 Hz (50 Hz to 57.5 Hz).

42 44 46 48 50 52 54 56 580

0.001

0.002

0.003

0.004

0.005

42 44 46 48 50 52 54 56 580

0.002

0.004

0.006

0.008

0.01

Freq

uenc

y Er

ror (

Hz)

Relative Frequency Error (%

)

Fundamental Frequency (Hz)

Error (Hz)Relative Error (%)

Fig. 5. Simulated estimated frequency error in steady-state operation with harmonics, as given in Table I.

than the maximum time (0.2s for 50 Hz system) for phasor estimation as specified by the IEC standard 61000-4-7 [45].

For evaluating the steady-state performance of the RDFT-TEO technique, the fundamental component of the grid voltage waveform is distorted by harmonics, as given in Table I. The peak error of the estimated fundamental frequency by using the RDFT-TEO technique is shown in Fig. 5, where the grid voltage waveform contains 1.0 p.u. fundamental amplitude, 14.58% THD, as given in Table I, and the fundamental frequency is varied from 42.5 Hz to 57.5 Hz. As it can be noticed, the RDFT-TEO technique can provide the estimation of the fundamental frequency range of 50 Hz 7.5 Hz with an error less than 0.005 Hz under 14.58% THD. Moreover, the maximum relative error of the estimated fundamental frequency remains inside the acceptable range (less than 0.03%) specified by the IEC standard 61000-4-7, where the relative error is defined as

Actual Value - Estimated ValueRelative Error (%) = 100%

Actual Value

(24)

IV. EXPERIMENTAL RESULTS

The experimental performance of the RDFT-TEO technique is compared with the RDFT-OC one [15]. The experimental setup, as shown in Fig. 6, consists of hardware and software parts. The hardware part includes a programmable AC power supply (REGATRON 4-Quadrant



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Electrical

~Grid

ProgrammableAC Power Supply

VoltageSensor

dSPACE1103

PersonalComputer

LNv

Fig. 6. Laboratory setup for real-time experiment.

TABLE II PARAMETERS OF THE RDFT-TEO AND RDFT-OC TECHNIQUES

RDFT-TEO RDFT-OC

250 rad/scut 2 LPFs based on 250 points Hamming window

Grid Simulator), a voltage sensor (LEM LV 25-400), a dSPACE1103 (DS1103) control board, and a personal computer (PC). The programmable power supply is used to generate the real-time single-phase grid voltage waveform (vLN, where the subscript LN indicates line-to-neutral). The power supply is programmed from the PC to introduce various grid conditions, such as DC offset, harmonics, frequency step, frequency sweep, voltage sag, voltage flicker, phase jump, notches and spikes, in the generated voltage waveform. On the other hand, the voltage sensor measures the generated voltage and steps down in a range of 10V to make it compatible with the DS1103 control board. The output of the voltage sensor is then sent to the 16 bit analog-to-digital converter (ADC) of the DS1103 control board. The PC is used to monitor the real-time experimental results obtained from the DS1103 control board. On the other hand, the software part of the experimental setup contains MATLAB/Simulink, DS1103 Real-Time Interface (RTI) and Control Desk Interface. The Simulink models of the RDFT-TEO and RDFT-OC techniques with the parameters given in Table II are compiled and uploaded to the DS1103 control board by using the automatic code generation. The Control Desk Interface running on the PC is used to set the parameters in real-time and also to monitor the estimated values.

A. Experimental Case Studies The following case studies are performed to compare the

performance of the RDFT-TEO and RDFT-OC techniques. i. Steady-state with DC offset and harmonics (Case-1)

ii. Frequency step and harmonics (Case-2) iii. Frequency sweep and harmonics (Case-3) iv. Voltage sag and harmonics (Case-4) v. Voltage flicker and harmonics (Case-5)

vi. Phase jump and harmonics (Case-6) vii. Notches, spikes and harmonics (Case-7)

viii. Voltage sag, frequency step, phase jump and harmonics (Case-8)

The grid voltage waveforms presented in all case studies contain 14.58% THD, as given in Table I. The experimental results are captured from a digital oscilloscope. Channel 1 of the oscilloscope contains the voltage waveform. On the other hand, Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

Case-1: Steady-State with DC Offset and Harmonics The steady-state performances of the RDFT-TEO and

RDFT-OC techniques are compared under DC offset and

v

RDFT-TEO 0.1 Hz/V

RDFT-OCf

50 Hz

Fig. 7. Experimental case-1: steady-state with DC offset (5%) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

v

RDFT-TEO 1.0 Hz/V

RDFT-OCf

50 Hz

Fig. 8. Experimental case-2: frequency step (-7.5 Hz: 50 to 42.5 Hz) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

harmonics. The grid voltage waveform is shown in Channel 1 of Fig. 7 and contains 5% DC offset and 14.58% THD, as given in Table I. The estimations of the nominal fundamental frequency by using the RDFT-TEO and RDFT-OC techniques are shown in Channels 2 and 3, respectively, of Fig. 7. As it can be noticed, both techniques provide similar estimation and can also reject the negative effects caused by DC offset and harmonics.

Case-2: Frequency Step and Harmonics The performances of the RDFT-TEO and RDFT-OC

techniques are compared under frequency step and harmonics. In this case study, the grid voltage waveform contains -7.5 Hz (50 to 42.5 Hz) frequency step and 14.58% THD, as given in Table I. The grid voltage waveform and the fundamental frequency step estimations by using the RDFT-TEO and RDFT-OC techniques are depicted in Fig. 8. As it can be seen, both techniques can track the frequency step. The settling time of the RDFT-TEO technique is less than 1.5 fundamental cycles and is faster than the RDFT-OC one. It can also be seen that the RDFT-TEO technique generates less ripple in the steady-state estimation of off-nominal fundamental frequency (42.5 Hz) when compared with the RDFT-OC one.



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v

RDFT-TEO 1.0 Hz/V

RDFT-OCf

50 Hz

Fig. 9. Experimental case-3: frequency sweep (+10Hz/s: 50 Hz to 57.5 Hz) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

v

RDFT-TEO 0.1 Hz/V

RDFT-OCf

50 Hz

Fig. 10. Experimental case-4: voltage flicker (5%) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

Case-3: Frequency Sweep and Harmonics A fundamental frequency sweep of +10 Hz/s up to 57.5 Hz

is considered into the grid voltage waveform containing harmonics, as given in Table I. The corresponding voltage waveform and the estimations of the fundamental frequency sweep are shown in Fig. 9. As it can be noticed, both the RDFT-TEO and RDFT-OC techniques can track the frequency sweep. In this case, the RDFT-TEO technique offers a slightly faster response when compared with the RDFT-OC.

Case-4: Voltage Flicker and Harmonics The grid voltage waveform, as shown in Channel 1 of Fig.

10, contains voltage flicker and harmonics, as given in Table I. The frequency and amplitude of the triangular voltage flicker are 2.5 Hz and 5% of fundamental amplitude, respectively. The fundamental frequency estimations are also shown in Fig. 10. As it can be observed, the performance of the RDFT-TEO technique for frequency estimation is more affected by the voltage flicker when compared with the RDFT-OC technique. In this case, the peak error of the estimated frequency by using the RDFT-TEO and RDFT-OC techniques are around 0.15 Hz and 0.03 Hz, respectively.

v

RDFT-TEO 0.5 Hz/V

RDFT-OCf

50 Hz

Fig. 11. Experimental case-5: voltage sag (30%) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

v

RDFT-TEO 1.0 Hz/V

RDFT-OCf

50 Hz

Fig. 12. Experimental case-6: phase jump (-30) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

Case-5: Voltage Sag and Harmonics A grid voltage waveform containing 30% voltage sag and

14.58% THD, as given in Table I, is shown in Channel 1 of Fig. 11. The fundamental frequency estimations by using the RDFT-TEO and RDFT-OC techniques are also shown in Channels 2 and 3, respectively, of Fig. 11. Similar to the voltage flicker, the RDFT-TEO technique is more affected by the voltage sag as compared to the RDFT-OC one. It can be noticed from Fig. 11 that the RDFT-TEO and RDFT-OC techniques present around 1.75 Hz and 0.13 Hz peak error, respectively, during the voltage sag.

Case-6: Phase Jump and Harmonics The grid voltage waveform, as shown in Channel 1 of Fig.

12, contains a -30 phase jump and harmonics, as given in Table I. The fundamental frequency estimations are also shown in Channels 2 and 3 of Fig. 12. As it can be seen, the performances of both the RDFT-TEO and RDFT-OC techniques are affected by the phase jump. The maximum error generated by the RDFT-TEO and RDFT-OC techniques during a phase jump of -30 are around 3.88 Hz and 4.13 Hz, respectively.



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v

RDFT-TEO 0.1 Hz/V

RDFT-OCf

50 Hz

Fig. 13. Experimental case-7: notches, spikes and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

Case-7: Notches, Spikes and Harmonics In this case study, the performances of both the RDFT-

TEO and RDFT-OC techniques are compared under voltage notches, spikes and harmonics. The grid voltage waveform and the fundamental frequency estimations are shown in Fig. 13. As it can be observed, the performance of the RDFT-TEO technique is slightly more affected by the voltage notches and spikes when compared with the RDFT-OC one.

Case-8: Voltage Sag, Frequency Step, Phase Jump and Harmonics

The performance of the RDFT-TEO and RDFT-OC techniques under a voltage sag (-10%), frequency step (-1Hz), phase jump (-10) and harmonics, as given in Table I, is shown in Fig. 14. In this case study, the voltage sag, frequency step and phase jump occur at the same time. It can be noticed from the results presented in Fig. 14 that the RDFT-TEO technique generates a slightly larger undershoot but it provides faster response when compared with the RDFT-OC one.

B. Performance and Computational Effort Comparisons of the RDFT-TEO and RDFT-OC Techniques

Table III shows a summary of the performance and computational effort comparisons of the RDFT-TEO and RDFT-OC techniques. As it can be seen, both techniques provide similar performance under DC offset. However, the RDFT-OC technique does not contain interdependent loop and the frequency estimation is less affected by the amplitude excursions such as voltage flicker, voltage sag, notches and spikes when compared with the RDFT-TEO one. On the other hand, the RDFT-TEO technique is simpler and computationally efficient as compared to the RDFT-OC one. In the DS1103 control board platform, the RDFT-TEO and RDFT-OC techniques take 2.96 s and 6.14 s turnaround time, respectively, for providing the real-time frequency estimation. When compared with the RDFT-OC technique, the RDFT-TEO one takes 51.8% less turnaround time in the DS1103 control board platform. In addition, the RDFT-TEO technique can provide improved estimation under harmonics, frequency step, frequency sweep and phase jump as compared to the RDFT-OC one, as it can also be noticed from Table III.

v

RDFT-TEO 1.0 Hz/V

RDFT-OCf

50 Hz

Fig. 14. Experimental case-8: voltage sag (-10%), frequency step (-1Hz), phase jump (-10) and harmonics. Channel 1 contains the voltage waveform, and Channels 2 and 3 show the fundamental frequency estimated by the RDFT-TEO and RDFT-OC techniques, respectively.

TABLE III PERFORMANCE AND COMPUTATIONAL EFFORT COMPARISONS OF THE RDFT-

TEO AND RDFT-OC TECHNIQUES

Comparison Cases RDFT-TEO RDFT-OC

Simplicity

Interdependent loop

Computational burden

Harmonics

DC offset = =

Frequency step

Frequency sweep

Voltage flicker

Voltage sag

Phase jump

Notches and spikes

symbol denotes which technique performs better with respect to the other one and = symbol indicates both techniques show similar performance for a case provided in the left column of Table III.

V. CONCLUSIONS

The performance evaluation of a power system fundamental frequency estimation technique has been reported in this paper. The technique relies on the Teager energy operator and a band-pass filter. The three consecutive samples based Teager energy operator is used to estimate the fundamental frequency. The band-pass filter is implemented based on the recursive DFT and inverse recursive DFT. The technique is computationally efficient and can also estimate a wide range of frequency variation accurately under the DC offset and harmonics. The technique also requires less computational effort, can provide faster estimation and is less



9 / 10

affected by harmonics as compared to a technique relying on the recursive DFT based decomposition of the single-phase system into orthogonal components. The presented simulation and experimental results have confirmed the effective applications of the technique for grid voltage fundamental frequency estimation.

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A. J. Roscoe, G. M. Burt, and J. R. McDonald, "Frequency and fundamental signal measurement algorithms for distributed control and protection applications," 495, 2009.A. J. Roscoe, I. F. Abdulhadi, and G. M. Burt, "P and M class phasor measurement unit algorithms using adaptive cascaded filters," Trans. Power Del., P. Sumathi and P. A. Janakirfor SDFTCir. Sys. II: Express Briefs, M. S. Reza, M. Ciobotaru, and V. G. Agelidis, "A recursive DFT based techniquProc. 39th Ann. Conf. IEEE Ind. Elect. (IECON2013)6425. IEC Standard 61000Power quality measurement methods," 2003.IEC Standard General guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected thereto," 2002.R. G. Lyons, "Understanding digital signal processing," SecEdition, Prentice Hall, 2008.E. Jacobsen and R. Lyons, "The sliding DFT," Mag., vol. 20, no. 2, pp. 74J. A. Rosendo Macias and A. G. Exposito, "Efficient movingDFT algorithms," vol. 45, no. 2, pp. 256IEC Standard 61000Harmonics and interharmonics including mains signaling at AC power port, low frequency immunity test," 2002.Y. F. Wacancellation PLL for fast selective harmonic detection," Ind. Elect., Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on cascaded dela26, no. 7, pp. 1987C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for threeusing modified synchronous reference frame," vol. 57, no. 11, pp. 3814


Institute of Energy Technology, Aalborg University. From 2010 to 2013, hwas a Research Fellow at the School of Electrical Engineering and Telecommunications, University of New South Wales (UNSW), Australia. He currently works as a Senior Research Associate at the UNSW, performing his research activities under the Australian research activities are in grid integration of PV systems, control of grid connected converters, and power management of hybrid energy storage

A. J. Roscoe, G. M. Burt, and J. R. McDonald, "Frequency and fundamental signal measurement algorithms for distributed control and protection applications," 495, 2009. A. J. Roscoe, I. F. Abdulhadi, and G. M. Burt, "P and M class phasor measurement unit algorithms using adaptive cascaded filters," Trans. Power Del., P. Sumathi and P. A. Janakirfor SDFT-based harmonic analysis of periodic signals," Cir. Sys. II: Express Briefs, M. S. Reza, M. Ciobotaru, and V. G. Agelidis, "A recursive DFT based techniquProc. 39th Ann. Conf. IEEE Ind. Elect. (IECON2013)

IEC Standard 61000Power quality measurement methods," 2003.IEC Standard General guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected thereto," 2002.R. G. Lyons, "Understanding digital signal processing," SecEdition, Prentice Hall, 2008.E. Jacobsen and R. Lyons, "The sliding DFT,"

vol. 20, no. 2, pp. 74J. A. Rosendo Macias and A. G. Exposito, "Efficient movingDFT algorithms," vol. 45, no. 2, pp. 256IEC Standard 61000Harmonics and interharmonics including mains signaling at AC power port, low frequency immunity test," 2002.Y. F. Wang and Y. W. Li, "Threecancellation PLL for fast selective harmonic detection," Ind. Elect., vol. 60, no. 4, pp. 1452Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on cascaded dela26, no. 7, pp. 1987C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for threeusing modified synchronous reference frame," vol. 57, no. 11, pp. 3814



A. J. Roscoe, G. M. Burt, and J. R. McDonald, "Frequency and fundamental signal measurement algorithms for distributed control and protection applications,"

A. J. Roscoe, I. F. Abdulhadi, and G. M. Burt, "P and M class phasor measurement unit algorithms using adaptive cascaded filters," Trans. Power Del., P. Sumathi and P. A. Janakir

based harmonic analysis of periodic signals," Cir. Sys. II: Express Briefs, M. S. Reza, M. Ciobotaru, and V. G. Agelidis, "A recursive DFT based technique for accurate estimation of grid voltage frequency," in Proc. 39th Ann. Conf. IEEE Ind. Elect. (IECON2013)

IEC Standard 61000Power quality measurement methods," 2003.IEC Standard 61000General guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected thereto," 2002. R. G. Lyons, "Understanding digital signal processing," SecEdition, Prentice Hall, 2008.E. Jacobsen and R. Lyons, "The sliding DFT,"

vol. 20, no. 2, pp. 74J. A. Rosendo Macias and A. G. Exposito, "Efficient movingDFT algorithms," vol. 45, no. 2, pp. 256IEC Standard 61000Harmonics and interharmonics including mains signaling at AC power port, low frequency immunity test," 2002.

ng and Y. W. Li, "Threecancellation PLL for fast selective harmonic detection,"

vol. 60, no. 4, pp. 1452Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on cascaded delayed signal cancellation," 26, no. 7, pp. 1987C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for threeusing modified synchronous reference frame," vol. 57, no. 11, pp. 3814


Mihai CiobotaruGalati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy Technology, Aain 2009.

Lecturer at the University of Galati. From 2007 to 2010, he was an Associate Research Fellow at the


A. J. Roscoe, G. M. Burt, and J. R. McDonald, "Frequency and fundamental signal measurement algorithms for distributed control and protection applications,"

A. J. Roscoe, I. F. Abdulhadi, and G. M. Burt, "P and M class phasor measurement unit algorithms using adaptive cascaded filters," Trans. Power Del., vol. 28, no. 3, pp. 1447P. Sumathi and P. A. Janakir

based harmonic analysis of periodic signals," Cir. Sys. II: Express Briefs, M. S. Reza, M. Ciobotaru, and V. G. Agelidis, "A recursive DFT

e for accurate estimation of grid voltage frequency," in Proc. 39th Ann. Conf. IEEE Ind. Elect. (IECON2013)

IEC Standard 61000-4Power quality measurement methods," 2003.

61000General guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected

R. G. Lyons, "Understanding digital signal processing," SecEdition, Prentice Hall, 2008.E. Jacobsen and R. Lyons, "The sliding DFT,"

vol. 20, no. 2, pp. 74J. A. Rosendo Macias and A. G. Exposito, "Efficient movingDFT algorithms," IEEE Trans. Cir. Sys. vol. 45, no. 2, pp. 256-IEC Standard 61000-Harmonics and interharmonics including mains signaling at AC power port, low frequency immunity test," 2002.


vol. 60, no. 4, pp. 1452Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on

yed signal cancellation," 26, no. 7, pp. 1987-1997, July 2011.C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for threeusing modified synchronous reference frame," vol. 57, no. 11, pp. 3814

Md. Shamim RezaBangladesh. He received his B.Sc. and M.Sc. degrees in Electrical and Electronic Engineeri(EEE) from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh, in 2006 and 2008, respectively, and the Ph.D. degree in Electrical Engineering from the University of New South Wales (UNSW), Sydney, NSW, Australia, in 2014. Currworking as a Research Associate at the UNSW. His research interests include advanced digital



From 2003 to 2004, he was an Associate Lecturer at the University of Galati. From 2007 to 2010, he was an Associate Research Fellow at the


A. J. Roscoe, G. M. Burt, and J. R. McDonald, "Frequency and fundamental signal measurement algorithms for distributed control and protection applications," IET Gen. Trans. Dist.,

A. J. Roscoe, I. F. Abdulhadi, and G. M. Burt, "P and M class phasor measurement unit algorithms using adaptive cascaded filters,"

vol. 28, no. 3, pp. 1447P. Sumathi and P. A. Janakir

based harmonic analysis of periodic signals," Cir. Sys. II: Express Briefs, M. S. Reza, M. Ciobotaru, and V. G. Agelidis, "A recursive DFT


4-30, "Testing and measurement techniquesPower quality measurement methods," 2003.

61000-4-7, "Testing and measurement techniquesGeneral guide on harmonics and interharmonics measurements and instrumentation, for power supply systems and equipment connected

R. G. Lyons, "Understanding digital signal processing," SecEdition, Prentice Hall, 2008.E. Jacobsen and R. Lyons, "The sliding DFT,"

vol. 20, no. 2, pp. 74J. A. Rosendo Macias and A. G. Exposito, "Efficient moving

IEEE Trans. Cir. Sys. -260, Feb. 1998.-4-13, "Testing and measurement techniques

Harmonics and interharmonics including mains signaling at AC power port, low frequency immunity test," 2002.



yed signal cancellation," 1997, July 2011.

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3821, Nov. 2010.



Mihai CiobotaruGalati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy Technology, Aa

From 2003 to 2004, he was an Associate

Lecturer at the University of Galati. From 2007 to 2010, he was an Associate Research Fellow at the





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based harmonic analysis of periodic signals," vol. 55, no. 1, pp. 51

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Mihai CiobotaruGalati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy Technology, Aalborg University, Aalborg, Denmark,


Institute of Energy Technology, Aalborg University. From 2010 to 2013, hwas a Research Fellow at the School of Electrical Engineering and Telecommunications, University of New South Wales (UNSW), Australia. He currently works as a Senior Research Associate at the UNSW, performing his research activities under the Australian Energy Research Institute. His main research activities are in grid integration of PV systems, control of grid connected converters, and power management of hybrid energy storage




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Mihai Ciobotaru (S'04Galati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy

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Institute of Energy Technology, Aalborg University. From 2010 to 2013, hwas a Research Fellow at the School of Electrical Engineering and Telecommunications, University of New South Wales (UNSW), Australia. He currently works as a Senior Research Associate at the UNSW, performing his

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Md. Shamim Reza (S'12) was born in Magura, Bangladesh. He received his B.Sc. and M.Sc. degrees in Electrical and Electronic Engineeri(EEE) from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh, in 2006 and 2008, respectively, and the Ph.D. degree in Electrical Engineering from the University of New South Wales (UNSW), Sydney, NSW, Australia, in 2014. Currworking as a Research Associate at the UNSW. His research interests include advanced digital


S'04-M'08Galati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy






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J. A. Rosendo Macias and A. G. Exposito, "Efficient movingII: Ana. Dig. Signal Proc.,

13, "Testing and measurement techniquesHarmonics and interharmonics including mains signaling at AC power




C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for threeusing modified synchronous reference frame," IEEE Trans. Ind. Elect.,

(S'12) was born in Magura, Bangladesh. He received his B.Sc. and M.Sc. degrees in Electrical and Electronic Engineeri(EEE) from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh, in 2006 and 2008, respectively, and the Ph.D. degree in Electrical Engineering from the University of New South Wales (UNSW), Sydney, NSW, Australia, in 2014. Currworking as a Research Associate at the UNSW. His research interests include advanced digital


M'08-Galati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy






vol. 3, no. 5


1459, July 2013.aman, "Integrated phase

based harmonic analysis of periodic signals," -55, Jan. 2008.



30, "Testing and measurement techniques



E. Jacobsen and R. Lyons, "The sliding DFT," IEEE Signal Proc.




1463, Apr. 2013. Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on


C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for three

IEEE Trans. Ind. Elect.,



-SM'14)Galati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy






vol. 3, no. 5


1459, July 2013.aman, "Integrated phase-locking scheme

based harmonic analysis of periodic signals," 55, Jan. 2008.


Proc. 39th Ann. Conf. IEEE Ind. Elect. (IECON2013), 2013, pp. 6420




IEEE Signal Proc.




Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on IEEE Trans. Power Elect.,

C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. LambertK. Bose, and S. U. Ahn, "A digital PLL scheme for three-phase s




SM'14) Galati, Romania. He received his B.Sc. and M.Sc. degrees in electrical engineering from the University of Galati, Galati, Romania in 2002 and 2003 respectively, and the Ph.D. degree in electrical engineering from the Institute of Energy






vol. 3, no. 5, pp. 485


1459, July 2013. locking scheme

based harmonic analysis of periodic signals," IEEE Trans. 55, Jan. 2008.


, 2013, pp. 6420




IEEE Signal Proc.

J. A. Rosendo Macias and A. G. Exposito, "Efficient moving-II: Ana. Dig. Signal Proc.,


phase cascaded delayed signal cancellation PLL for fast selective harmonic detection," IEEE Trans.

Y. F. Wang and Y. W. Li, "Grid synchronization PLL based on IEEE Trans. Power Elect.,

C. H. da Silva, R. R. Pereira, L. E. B. da Silva, G. Lambert-Torres, B. phase s


(S'12) was born in Magura, Bangladesh. He received his B.Sc. and M.Sc. degrees in Electrical and Electronic Engineeri(EEE) from Bangladesh University of Engineering and Technology (BUET), Dhaka, Bangladesh, in 2006 and 2008, respectively, and t

2. IEEE Journal of Emerging and Selected Topics in Power Electronics Volume issue 2015 [doi 10.1109%2Fjestpe.2015.2405094] Reza, Md. Shamim_ Ciobotaru, Mihai_ Agelidis, Vassilios --

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