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1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes
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1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes.

Dec 14, 2015

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Page 1: 1 Digital Logic Design Week 7 Encoders, Decoders, Multiplexers, Demuxes.

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Digital Logic Design

Week 7

Encoders, Decoders, Multiplexers, Demuxes

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MSI (Medium Scale Integration) Circuits (chips)

MSI chips have complete circuits, built from multiple gates, on a single chip.

• Two classes of such integrated chips (ICs) are: Encoders and Decoders Multiplexers and Demultiplexers

• Are designed and based on binary coded input.

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simple binary codes

2–bit codes: 3–bit codes:00 0 000 001 1 001 110 2 010 211 3 011 3

100 4101 5110 6111 7

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Encoders typically have 2N inputs and N outputs.These are called 2N–to–N encoders.Typical examples include 4–to–2 encoders (probably not used much)

8–to–3 encoders16–to–4 encoders

It is assumed that only one input at a time is active.

Encoders

10 key numeric keypad data encoded into 4-bit binary code.Due to the decimal arithmetic, we also have 10–to–4 encoders. (Why not 10:3?)

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Input (10 bits) code Output codeD9 through D0 Y3 Y2 Y1 Y0

0000000001 0 0 0 0

0000000010 0 0 0 1

0000000100 0 0 1 0

0000001000 0 0 1 1

0000010000 0 1 0 0

0000100000 0 1 0 1

0001000000 0 1 1 0

0010000000 0 1 1 1

0100000000 1 0 0 0

1000000000 1 0 0 1 Y3 = D8 + D9, Y2=… , Y1=… , Y0=…

ExerciseWrite the truth table for the 10:4 decimal keypad encoder and boolean expressions of each output. Draw the circuit diagram.

The Circuit Diagram for the 10–4 Encoder

http://www.edwardbosworth.com/My5155_Slides/Chapter05/EncodersAndDecoders.htm

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Decoders

Decoders are the opposite of encoders; they are N–to–2N devices.Typical examples include 2–to–4 decoders

3–to–8 decoders4–to–16 decoders

optionally, they may have an enable line

• active-high or active-low (the selected output goes to logic 0)• used for to convert n bit binary information to 2n unique outputs

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2-to-4 Decoder

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74LS138 (3-to-8 active-low decoder)

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Exercise

Define the equations for each output of the previous given 3:8 decoder IC (74LS138) truth table. Draw a circuit for equations of the outputs.

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74LS139 (2-to-4 duo-decoder IC)

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BCD-to-7 Segment Display Decoder

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Decoderfor7-segment display

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RS232 4-1 D-Type Serial Port Data Multiplexer

Multiplexer

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A 2-input multiplexer

Definition: An n-input multiplexer (called a MUX) is an n-way digital switch that switches/directs/routes one of ‘n’ inputs to the output line.• controlled by the control lines ‘S’ to select which input line to be “connected” to the

output.• means that the logical value of the output will be the same as the logical value of the

selected input.

Quadruple 2-Line To 1-Line Data Selectors/Multiplexers

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4:1Mux

Fout= I3S0’S1’ + ……

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Exercise

The logic circuit above is a design of 4 to 1 multiplexer with strobe input using NAND gates. Show the truth table for the mux and write the expression of the output Y.

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ExerciseHere we see an 8:1 multiplexer made of two 4:1 and one 2:1 multiplexer. Try to design a 4:1 mux using three 2:1 muxes?

CD74ACT151: 8-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXER

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Figure for 16:4 multiplexer(or Quad 4:1 mux)

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Exercise

Define the function (job) of the logic design shown in figure?